From 822ffe1ef0223664a27ca560c17d3cb2a47edf36 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Tue, 4 Dec 2018 15:08:56 -0700 Subject: soc/amd/stoneyridge: Run romstage mainboard code before AGESA This is needed so the next patch can set up GPIOs before AGESA runs. BUG=b:120436919 TEST=Verified romstage mainboard code runs before AGESA Change-Id: I76c035e166cd64382b52dff5ae00a6f115cbac9b Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/c/30038 Reviewed-by: Daniel Kurtz Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/romstage.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'src/soc') diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index ed83e1ee1d..931448869e 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -96,11 +96,10 @@ asmlinkage void car_stage_entry(void) if (IS_ENABLED(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW)) load_smu_fw1(); + mainboard_romstage_entry(s3_resume); bsp_agesa_call(); - mainboard_romstage_entry(s3_resume); - if (!s3_resume) { post_code(0x40); do_agesawrapper(agesawrapper_amdinitpost, "amdinitpost"); -- cgit v1.2.3