From 73be9dd82c033a9bce3fc7ff11dab453e9cfde82 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 7 Aug 2018 14:02:55 -0700 Subject: arm64: Remove set_cntfrq() function CNTFRQ_EL0 is a normal AArch64 architectural register like hundreds of others that are all accessed through the raw_(read|write)_${register}() family of functions. There's no reason why this register in particular should have an inconsistent accessor, so replace all instances of set_cntfrq() with raw_write_cntfrq_el0() and get rid of it. Change-Id: I599519ba71c287d4085f9ad28d7349ef0b1eea9b Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/27947 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/cavium/cn81xx/timer.c | 4 ++-- src/soc/nvidia/tegra210/ramstage.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc') diff --git a/src/soc/cavium/cn81xx/timer.c b/src/soc/cavium/cn81xx/timer.c index b1c2285b6d..f2a870adee 100644 --- a/src/soc/cavium/cn81xx/timer.c +++ b/src/soc/cavium/cn81xx/timer.c @@ -17,6 +17,7 @@ */ #include +#include #include #include #include @@ -25,7 +26,6 @@ #include #include #include -#include /* Global System Timers Unit (GTI) registers */ struct cn81xx_timer { @@ -131,7 +131,7 @@ void init_timer(void) void soc_timer_init(void) { - set_cntfrq(tickrate); + raw_write_cntfrq_el0(tickrate); } /** diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c index 18fdded800..86fae67c43 100644 --- a/src/soc/nvidia/tegra210/ramstage.c +++ b/src/soc/nvidia/tegra210/ramstage.c @@ -13,8 +13,8 @@ * GNU General Public License for more details. */ -#include #include +#include #include #include #include @@ -26,7 +26,7 @@ static void arm64_arch_timer_init(void) { uint32_t freq = clock_get_osc_khz() * 1000; // Set the cntfrq register. - set_cntfrq(freq); + raw_write_cntfrq_el0(freq); } static void mselect_enable_wrap(void) -- cgit v1.2.3