From 693c55c545809f12663831f1f67c9584fb9533cd Mon Sep 17 00:00:00 2001 From: Jacob Garber Date: Thu, 25 Jul 2019 12:06:28 -0600 Subject: soc/nvidia/tegra124: Assert divisor is non-zero The logic for the calculation of plld.m is rather complicated, so do a sanity check that it is non-zero before doing the division. Change-Id: I60f49b8eed47a3de86713304bde7a4d3f3d935dd Signed-off-by: Jacob Garber Found-by: Coverity CID 1260981 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34572 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner Reviewed-by: Paul Menzel --- src/soc/nvidia/tegra124/clock.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc') diff --git a/src/soc/nvidia/tegra124/clock.c b/src/soc/nvidia/tegra124/clock.c index 6877c04b98..bb0343d432 100644 --- a/src/soc/nvidia/tegra124/clock.c +++ b/src/soc/nvidia/tegra124/clock.c @@ -13,6 +13,7 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ +#include #include #include #include @@ -377,6 +378,7 @@ clock_display(u32 frequency) printk(BIOS_WARNING, "%s: Failed to match output frequency %u, " "best difference is %u.\n", __func__, frequency, best_diff); + assert(plld.m != 0); rounded_rate = (ref / plld.m * plld.n) >> plld.p; } -- cgit v1.2.3