From 6275e345234383a249c8a44a777e1937219628fa Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 21 Nov 2018 00:11:35 +0100 Subject: soc/intel/skylake: Use real common code for VMX init Use the common VMX implementation, and set IA32_FEATURE_CONTROL lock bit per Kconfig *after* SGX is configured (as SGX also sets bits on the IA32_FEATURE_CONTROL register). As it is now correctly based on a Kconfig, the `VmxEnable` devicetree setting vanishes. Test: build/boot google/[chell,fizz], observe Virtualization enabled under Windows 10 when VMX enabled and lock bit set. Change-Id: Iea598cf74ba542a650433719f29cb5c9df700c0f Signed-off-by: Nico Huber Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/29682 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/soc/intel/skylake/Kconfig | 2 +- src/soc/intel/skylake/chip.h | 3 --- src/soc/intel/skylake/chip_fsp20.c | 2 +- src/soc/intel/skylake/cpu.c | 33 ++++++++++--------------- src/soc/intel/skylake/romstage/romstage_fsp20.c | 2 +- 5 files changed, 16 insertions(+), 26 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 506a04165b..77d259b21b 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select COLLECT_TIMESTAMPS select COMMON_FADT + select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select C_ENVIRONMENT_BOOTBLOCK select FSP_M_XIP if MAINBOARD_USES_FSP2_0 @@ -65,7 +66,6 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP select SOC_INTEL_COMMON_BLOCK_UART - select SOC_INTEL_COMMON_BLOCK_VMX select SOC_INTEL_COMMON_PCH_BASE select SOC_INTEL_COMMON_NHLT select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 39e5056bca..f131a1a5df 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -465,9 +465,6 @@ struct soc_intel_skylake_config { */ u8 SendVrMbxCmd; - /* Enable/Disable VMX feature */ - u8 VmxEnable; - /* * PRMRR size setting with three options * 0x02000000 - 32MiB diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 3ade8d72cf..f4e17c640b 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -322,7 +322,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->LogoPtr = config->LogoPtr; params->LogoSize = config->LogoSize; - params->CpuConfig.Bits.VmxEnable = config->VmxEnable; + params->CpuConfig.Bits.VmxEnable = IS_ENABLED(CONFIG_ENABLE_VMX); params->PchPmWoWlanEnable = config->PchPmWoWlanEnable; params->PchPmWoWlanDeepSxEnable = config->PchPmWoWlanDeepSxEnable; diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 413fbbb130..910dcb88c9 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -39,7 +40,6 @@ #include #include #include -#include #include #include #include @@ -467,6 +467,16 @@ static void per_cpu_smm_trigger(void) smm_relocate(); } +static void vmx_configure(void *unused) +{ + set_feature_ctrl_vmx(); +} + +static void fc_lock_configure(void *unused) +{ + set_feature_ctrl_lock(); +} + static void post_mp_init(void) { /* Set Max Ratio */ @@ -486,6 +496,8 @@ static void post_mp_init(void) mp_run_on_all_cpus(vmx_configure, NULL, 2 * USECS_PER_MSEC); mp_run_on_all_cpus(sgx_configure, NULL, 14 * USECS_PER_MSEC); + + mp_run_on_all_cpus(fc_lock_configure, NULL, 2 * USECS_PER_MSEC); } static const struct mp_ops mp_ops = { @@ -566,22 +578,3 @@ int soc_fill_sgx_param(struct sgx_param *sgx_param) sgx_param->enable = conf->sgx_enable; return 0; } -int soc_fill_vmx_param(struct vmx_param *vmx_param) -{ - struct device *dev = SA_DEV_ROOT; - config_t *conf; - - if (!dev) { - printk(BIOS_ERR, "Failed to get root dev for checking VMX param\n"); - return -1; - } - - conf = dev->chip_info; - if (!conf) { - printk(BIOS_ERR, "Failed to get chip_info for VMX param\n"); - return -1; - } - - vmx_param->enable = conf->VmxEnable; - return 0; -} diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 2a601588d6..6fe79f66f6 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -225,7 +225,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->RMT = config->Rmt; m_cfg->CmdTriStateDis = config->CmdTriStateDis; m_cfg->DdrFreqLimit = config->DdrFreqLimit; - m_cfg->VmxEnable = config->VmxEnable; + m_cfg->VmxEnable = IS_ENABLED(CONFIG_ENABLE_VMX); m_cfg->PrmrrSize = config->PrmrrSize; for (i = 0; i < ARRAY_SIZE(config->PcieRpEnable); i++) { if (config->PcieRpEnable[i]) -- cgit v1.2.3