From 5c619a285cd47ffafcb28872d52495b0eef2ea77 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 7 Dec 2017 15:12:42 +0530 Subject: soc/intel/skylake: Remove set_subsystem() from SoC Intel common PCI driver is handle PCI subsystem ID programming, hence no need to have an explicit soc function to do the same. TEST=PCI subsystem id is getting programming during pci enumeration. Change-Id: Iead57a286b26d532e578cfff99f412c23fd4c2fe Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/22769 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh --- src/soc/intel/skylake/chip.c | 15 --------------- src/soc/intel/skylake/chip_fsp20.c | 4 ---- src/soc/intel/skylake/include/fsp11/soc/ramstage.h | 1 - src/soc/intel/skylake/include/fsp20/soc/ramstage.h | 2 -- 4 files changed, 22 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 4909ea4ccb..8002270ed9 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -824,18 +824,3 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *original, original->FastPkgCRampDisable, params->FastPkgCRampDisable); } - -static void pci_set_subsystem(device_t dev, unsigned int vendor, - unsigned int device) -{ - if (!vendor || !device) - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - pci_read_config32(dev, PCI_VENDOR_ID)); - else - pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, - (device << 16) | vendor); -} - -struct pci_operations soc_pci_ops = { - .set_subsystem = &pci_set_subsystem -}; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 8e5cc2a627..f4060b2d99 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -293,10 +293,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) soc_irq_settings(params); } -struct pci_operations soc_pci_ops = { - .set_subsystem = &pci_dev_set_subsystem -}; - /* Mainboard GPIO Configuration */ __attribute__((weak)) void mainboard_silicon_init_params(FSP_S_CONFIG *params) { diff --git a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h index 1dba445a20..3ab0efa7e5 100644 --- a/src/soc/intel/skylake/include/fsp11/soc/ramstage.h +++ b/src/soc/intel/skylake/include/fsp11/soc/ramstage.h @@ -29,7 +29,6 @@ void soc_irq_settings(FSP_SIL_UPD *params); void soc_init_pre_device(void *chip_info); void soc_fsp_load(void); const char *soc_acpi_name(const struct device *dev); -extern struct pci_operations soc_pci_ops; /* Get igd framebuffer bar */ uintptr_t fsp_soc_get_igd_bar(void); diff --git a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h index 69439149b3..23443c33d3 100644 --- a/src/soc/intel/skylake/include/fsp20/soc/ramstage.h +++ b/src/soc/intel/skylake/include/fsp20/soc/ramstage.h @@ -32,6 +32,4 @@ void soc_init_pre_device(void *chip_info); void soc_irq_settings(FSP_SIL_UPD *params); const char *soc_acpi_name(const struct device *dev); -extern struct pci_operations soc_pci_ops; - #endif -- cgit v1.2.3