From 56226663960af6b2704b86aad043f94f0b980dec Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Mon, 8 Nov 2021 21:34:34 +0000 Subject: soc/intel/tigerlake: Add config option for S3 ACPI Add Kconfig option `SOC_INTEL_TIGERLAKE_S3` which will adjust the ACPI to not offer D3Cold when using S3. Signed-off-by: Sean Rhodes Change-Id: Ieb1cc3d6a03cb452ff38ae393a993e881d9b5ff4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59024 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/tigerlake/Kconfig | 6 + src/soc/intel/tigerlake/acpi/tcss.asl | 192 ++++++++++++++------------- src/soc/intel/tigerlake/acpi/tcss_dma.asl | 47 +++++-- src/soc/intel/tigerlake/acpi/tcss_pcierp.asl | 42 ++++-- src/soc/intel/tigerlake/acpi/tcss_xhci.asl | 22 +-- 5 files changed, 186 insertions(+), 123 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 91f33161b4..a7b3ae447d 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -187,6 +187,12 @@ config SOC_INTEL_I2C_DEV_MAX int default 6 +config SOC_INTEL_TIGERLAKE_S3 + bool + default n + help + Select if using S3 instead of S0ix to disable D3Cold + config SOC_INTEL_UART_DEV_MAX int default 3 diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index cdbf0cc7f4..1d58bfb520 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -41,6 +41,12 @@ Scope (\_SB) { +#if CONFIG(SOC_INTEL_TIGERLAKE_S3) + Name (S0IX, 0) +#else + Name (S0IX, 1) +#endif + /* Device base address */ Method (BASE, 1) { @@ -673,116 +679,118 @@ Scope (\_SB.PCI0) } } - Method (TCON, 0) - { - /* Reset IOM D3 cold bit if it is in D3 cold now. */ - If (TD3C == 1) /* It was in D3 cold before. */ + If (S0IX == 1) { + Method (TCON, 0) { - /* Reset IOM D3 cold bit. */ - TD3C = 0 /* Request IOM for D3 cold exit sequence. */ - Local0 = 0 /* Time check counter variable */ - /* Wait for ack, the maximum wait time for the ack is 100 msec. */ - While ((TACK != 0) && (Local0 < TCSS_IOM_ACK_TIMEOUT_IN_MS)) { - /* - * Wait in this loop until TACK becomes 0 with timeout - * TCSS_IOM_ACK_TIMEOUT_IN_MS by default. - */ - Sleep (1) /* Delay of 1ms. */ - Local0++ - } - - If (Local0 == TCSS_IOM_ACK_TIMEOUT_IN_MS) { - Printf("Error: Timeout occurred.") - } - Else + /* Reset IOM D3 cold bit if it is in D3 cold now. */ + If (TD3C == 1) /* It was in D3 cold before. */ { - /* - * Program IOP MCTP Drop (TCSS_IN_D3) after D3 cold exit and - * acknowledgement by IOM. - */ - TCD3 = 0 - /* - * If the TCSS Deven is cleared by BIOS Mailbox request, then - * restore to previously saved value of TCSS DEVNE. - */ - Local0 = 0 - While (\_SB.PCI0.TXHC.VDID == 0xFFFFFFFF) { - If (DSGS () == 1) { - DSCR (0) - } + /* Reset IOM D3 cold bit. */ + TD3C = 0 /* Request IOM for D3 cold exit sequence. */ + Local0 = 0 /* Time check counter variable */ + /* Wait for ack, the maximum wait time for the ack is 100 msec. */ + While ((TACK != 0) && (Local0 < TCSS_IOM_ACK_TIMEOUT_IN_MS)) { + /* + * Wait in this loop until TACK becomes 0 with timeout + * TCSS_IOM_ACK_TIMEOUT_IN_MS by default. + */ + Sleep (1) /* Delay of 1ms. */ Local0++ - If (Local0 == 5) { - Printf("pCode mailbox command failed.") - Break + } + + If (Local0 == TCSS_IOM_ACK_TIMEOUT_IN_MS) { + Printf("Error: Timeout occurred.") + } + Else + { + /* + * Program IOP MCTP Drop (TCSS_IN_D3) after D3 cold exit and + * acknowledgement by IOM. + */ + TCD3 = 0 + /* + * If the TCSS Deven is cleared by BIOS Mailbox request, then + * restore to previously saved value of TCSS DEVNE. + */ + Local0 = 0 + While (\_SB.PCI0.TXHC.VDID == 0xFFFFFFFF) { + If (DSGS () == 1) { + DSCR (0) + } + Local0++ + If (Local0 == 5) { + Printf("pCode mailbox command failed.") + Break + } } } } + Else { + Printf("Drop TCON due to it is already exit D3 cold.") + } } - Else { - Printf("Drop TCON due to it is already exit D3 cold.") - } - } - Method (TCOF, 0) - { - If ((\_SB.PCI0.TXHC.SD3C != 0) || (\_SB.PCI0.TDM0.SD3C != 0) - || (\_SB.PCI0.TDM1.SD3C != 0)) + Method (TCOF, 0) { - Printf("Skip D3C entry.") - Return - } - - /* - * If the TCSS Deven in normal state, then Save current TCSS DEVEN value and - * clear it. - */ - Local0 = 0 - While (\_SB.PCI0.TXHC.VDID != 0xFFFFFFFF) { - If (DSGS () == 0) { - DSCR (1) - } - Local0++ - If (Local0 == 5) { - Printf("pCode mailbox command failed.") - Break + If ((\_SB.PCI0.TXHC.SD3C != 0) || (\_SB.PCI0.TDM0.SD3C != 0) + || (\_SB.PCI0.TDM1.SD3C != 0)) + { + Printf("Skip D3C entry.") + Return } - } - - /* - * Program IOM MCTP Drop (TCSS_IN_D3) in D3Cold entry before entering D3 cold. - */ - TCD3 = 1 - /* Request IOM for D3 cold entry sequence. */ - TD3C = 1 - } + /* + * If the TCSS Deven in normal state, then Save current TCSS DEVEN value and + * clear it. + */ + Local0 = 0 + While (\_SB.PCI0.TXHC.VDID != 0xFFFFFFFF) { + If (DSGS () == 0) { + DSCR (1) + } + Local0++ + If (Local0 == 5) { + Printf("pCode mailbox command failed.") + Break + } + } - PowerResource (D3C, 5, 0) - { - /* - * Variable to save power state - * 1 - TC Cold request cleared. - * 0 - TC Cold request sent. - */ - Name (STAT, 0x1) + /* + * Program IOM MCTP Drop (TCSS_IN_D3) in D3Cold entry before entering D3 cold. + */ + TCD3 = 1 - Method (_STA, 0) - { - Return (STAT) + /* Request IOM for D3 cold entry sequence. */ + TD3C = 1 } - Method (_ON, 0) + PowerResource (D3C, 5, 0) { - \_SB.PCI0.TCON() - STAT = 1 - } + /* + * Variable to save power state + * 1 - TC Cold request cleared. + * 0 - TC Cold request sent. + */ + Name (STAT, 0x1) - Method (_OFF, 0) - { - \_SB.PCI0.TCOF() - STAT = 0 + Method (_STA, 0) + { + Return (STAT) + } + + Method (_ON, 0) + { + \_SB.PCI0.TCON() + STAT = 1 + } + + Method (_OFF, 0) + { + \_SB.PCI0.TCOF() + STAT = 0 + } } - } + } /* End: S0IX */ /* * TCSS xHCI device diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl index 273a71ec48..ff0c5a9a47 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl @@ -27,24 +27,48 @@ Name (STAT, 0x1) /* Variable to save power state 1 - D0, 0 - D3C */ Method (_S0W, 0x0) { - Return (0x4) + If (S0IX == 1) { + Return (0x04) + } Else { + Return (0x03) + } } +/* + * Get power resources that are dependent on this device for Operating System Power Management + * to put the device in the D0 device state + */ Method (_PR0) { - If (DUID == 0) { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) + If (S0IX == 1) { + If (DUID == 0) { + Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) + } Else { + Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) + } } Else { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) + If (DUID == 0) { + Return (Package() { \_SB.PCI0.TBT0 }) + } Else { + Return (Package() { \_SB.PCI0.TBT1 }) + } } } Method (_PR3) { - If (DUID == 0) { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) + If (S0IX == 1) { + If (DUID == 0) { + Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) + } Else { + Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) + } } Else { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) + If (DUID == 0) { + Return (Package() { \_SB.PCI0.TBT0 }) + } Else { + Return (Package() { \_SB.PCI0.TBT1 }) + } } } @@ -53,8 +77,8 @@ Method (_PR3) */ Method (D3CX, 0, Serialized) { - DD3E = 0 /* Disable DMA RTD3 */ - STAT = 0x1 + DD3E = 0x00 /* Disable DMA RTD3 */ + STAT = 0x01 } /* @@ -62,8 +86,8 @@ Method (D3CX, 0, Serialized) */ Method (D3CE, 0, Serialized) { - DD3E = 1 /* Enable DMA RTD3 */ - STAT = 0 + DD3E = 0x01 /* Enable DMA RTD3 */ + STAT = 0x00 } /* @@ -71,7 +95,6 @@ Method (D3CE, 0, Serialized) * TCSS D3 Cold and TBT RTD3 is only available when system power state is in S0. */ Name (SD3C, 0) - Method (_PS0, 0, Serialized) { } diff --git a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl index 7576564dfb..6b26231c1b 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl @@ -267,25 +267,45 @@ Method (_PS3, 0, Serialized) Method (_S0W, 0x0, NotSerialized) { - Return (0x4) + If (S0IX == 1) { + Return (0x4) + } Else { + Return (0x3) + } } Method (_PR0) { - If ((TUID == 0) || (TUID == 1)) { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) - } Else { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) - } + If (S0IX == 1) { + If ((TUID == 0) || (TUID == 1)) { + Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) + } Else { + Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) + } + } Else { + If ((TUID == 0) || (TUID == 1)) { + Return (Package() { \_SB.PCI0.TBT0 }) + } Else { + Return (Package() { \_SB.PCI0.TBT1 }) + } + } } Method (_PR3) { - If ((TUID == 0) || (TUID == 1)) { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) - } Else { - Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) - } + If (S0IX == 1) { + If ((TUID == 0) || (TUID == 1)) { + Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) + } Else { + Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT1 }) + } + } Else { + If ((TUID == 0) || (TUID == 1)) { + Return (Package() { \_SB.PCI0.TBT0 }) + } Else { + Return (Package() { \_SB.PCI0.TBT1 }) + } + } } /* diff --git a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl index acbeb30c13..32aa2f28bd 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl @@ -30,7 +30,11 @@ Method (_PS3, 0, Serialized) Method (_S0W, 0x0, NotSerialized) { - Return (0x4) + If (S0IX == 1) { + Return (0x4) + } Else { + Return (0x3) + } } /* @@ -39,14 +43,16 @@ Method (_S0W, 0x0, NotSerialized) */ Name (SD3C, 0) -Method (_PR0) -{ - Return (Package () { \_SB.PCI0.D3C }) -} +If (S0IX == 1) { + Method (_PR0) + { + Return (Package () { \_SB.PCI0.D3C }) + } -Method (_PR3) -{ - Return (Package () { \_SB.PCI0.D3C }) + Method (_PR3) + { + Return (Package () { \_SB.PCI0.D3C }) + } } /* -- cgit v1.2.3