From 53dabc29f2eb44761f4bc28e7f5e211bfeffb234 Mon Sep 17 00:00:00 2001 From: Tristan Shieh Date: Tue, 12 Jun 2018 14:23:01 +0800 Subject: mediatek: Move watchdog timer code to a common directory Move watchdog timer (WDT) code which can be reused into a common directory under soc/mediatek. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Elm Change-Id: Icbeb04f775c3c0fdc18dd198df8591f5c4b6ddce Signed-off-by: Tristan Shieh Reviewed-on: https://review.coreboot.org/27025 Reviewed-by: Julius Werner Tested-by: build bot (Jenkins) --- src/soc/mediatek/common/include/soc/wdt.h | 53 ++++++++++++++++++++++++++ src/soc/mediatek/common/wdt.c | 63 +++++++++++++++++++++++++++++++ src/soc/mediatek/mt8173/Makefile.inc | 6 +-- src/soc/mediatek/mt8173/include/soc/wdt.h | 53 -------------------------- src/soc/mediatek/mt8173/wdt.c | 63 ------------------------------- 5 files changed, 119 insertions(+), 119 deletions(-) create mode 100644 src/soc/mediatek/common/include/soc/wdt.h create mode 100644 src/soc/mediatek/common/wdt.c delete mode 100644 src/soc/mediatek/mt8173/include/soc/wdt.h delete mode 100644 src/soc/mediatek/mt8173/wdt.c (limited to 'src/soc') diff --git a/src/soc/mediatek/common/include/soc/wdt.h b/src/soc/mediatek/common/include/soc/wdt.h new file mode 100644 index 0000000000..a15434c70d --- /dev/null +++ b/src/soc/mediatek/common/include/soc/wdt.h @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_MEDIATEK_COMMON_WDT_H +#define SOC_MEDIATEK_COMMON_WDT_H + +#include + +struct mtk_wdt_regs { + u32 wdt_mode; + u32 wdt_length; + u32 wdt_restart; + u32 wdt_status; + u32 wdt_interval; + u32 wdt_swrst; + u32 wdt_swsysrst; + u32 reserved[9]; + u32 wdt_debug_ctrl; +}; + +/* WDT_MODE */ +enum { + MTK_WDT_MODE_KEY = 0x22000000, + MTK_WDT_MODE_DUAL_MODE = 1 << 6, + MTK_WDT_MODE_IRQ = 1 << 3, + MTK_WDT_MODE_EXTEN = 1 << 2, + MTK_WDT_MODE_EXT_POL = 1 << 1, + MTK_WDT_MODE_ENABLE = 1 << 0 +}; + +/* WDT_RESET */ +enum { + MTK_WDT_SWRST_KEY = 0x1209, + MTK_WDT_STA_SPM_RST = 1 << 1, + MTK_WDT_STA_SW_RST = 1 << 30, + MTK_WDT_STA_HW_RST = 1 << 31 +}; + +int mtk_wdt_init(void); + +#endif /* SOC_MEDIATEK_COMMON_WDT_H */ diff --git a/src/soc/mediatek/common/wdt.c b/src/soc/mediatek/common/wdt.c new file mode 100644 index 0000000000..c2617531a6 --- /dev/null +++ b/src/soc/mediatek/common/wdt.c @@ -0,0 +1,63 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE; + +int mtk_wdt_init(void) +{ + uint32_t wdt_sta; + + /* Write Mode register will clear status register */ + wdt_sta = read32(&mtk_wdt->wdt_status); + + printk(BIOS_INFO, "WDT: Last reset was "); + if (wdt_sta & MTK_WDT_STA_HW_RST) { + printk(BIOS_INFO, "hardware watchdog\n"); + mark_watchdog_tombstone(); + } else if (wdt_sta & MTK_WDT_STA_SW_RST) + printk(BIOS_INFO, "normal software reboot\n"); + else if (wdt_sta & MTK_WDT_STA_SPM_RST) + printk(BIOS_INFO, "SPM reboot\n"); + else if (!wdt_sta) + printk(BIOS_INFO, "cold boot\n"); + else + printk(BIOS_INFO, "unexpected reset type: %#.8x\n", wdt_sta); + + /* Config watchdog reboot mode: + * Clearing bits: + * DUAL_MODE & IRQ: trigger reset instead of irq then reset. + * EXT_POL: select watchdog output signal as active low. + * ENABLE: disable watchdog on initialization. + * Setting bit EXTEN to enable watchdog output. + */ + clrsetbits_le32(&mtk_wdt->wdt_mode, + MTK_WDT_MODE_DUAL_MODE | MTK_WDT_MODE_IRQ | + MTK_WDT_MODE_EXT_POL | MTK_WDT_MODE_ENABLE, + MTK_WDT_MODE_EXTEN | MTK_WDT_MODE_KEY); + + return wdt_sta; +} + +void do_hard_reset(void) +{ + write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY); +} diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc index 3bb0ae0b31..b382455c67 100644 --- a/src/soc/mediatek/mt8173/Makefile.inc +++ b/src/soc/mediatek/mt8173/Makefile.inc @@ -28,7 +28,7 @@ bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c endif bootblock-y += gpio.c gpio_init.c pmic_wrap.c mt6391.c -bootblock-y += wdt.c +bootblock-y += ../common/wdt.c bootblock-y += mmu_operations.c ################################################################################ @@ -40,7 +40,7 @@ verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c verstage-y += ../common/timer.c verstage-y += timer.c -verstage-y += wdt.c +verstage-y += ../common/wdt.c verstage-$(CONFIG_SPI_FLASH) += flash_controller.c verstage-y += gpio.c @@ -74,7 +74,7 @@ ramstage-y += pmic_wrap.c mt6391.c i2c.c ramstage-y += mt6311.c ramstage-y += da9212.c ramstage-y += gpio.c -ramstage-y += wdt.c +ramstage-y += ../common/wdt.c ramstage-y += pll.c ramstage-y += rtc.c diff --git a/src/soc/mediatek/mt8173/include/soc/wdt.h b/src/soc/mediatek/mt8173/include/soc/wdt.h deleted file mode 100644 index ddca10290f..0000000000 --- a/src/soc/mediatek/mt8173/include/soc/wdt.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 MediaTek Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef SOC_MEDIATEK_COMMON_WDT_H -#define SOC_MEDIATEK_COMMON_WDT_H - -#include - -struct mtk_wdt_regs { - u32 wdt_mode; - u32 wdt_length; - u32 wdt_restart; - u32 wdt_status; - u32 wdt_interval; - u32 wdt_swrst; - u32 wdt_swsysrst; - u32 reserved[9]; - u32 wdt_debug_ctrl; -}; - -/* WDT_MODE */ -enum { - MTK_WDT_MODE_KEY = 0x22000000, - MTK_WDT_MODE_DUAL_MODE = 1 << 6, - MTK_WDT_MODE_IRQ = 1 << 3, - MTK_WDT_MODE_EXTEN = 1 << 2, - MTK_WDT_MODE_EXT_POL = 1 << 1, - MTK_WDT_MODE_ENABLE = 1 << 0 -}; - -/* WDT_RESET */ -enum { - MTK_WDT_SWRST_KEY = 0x1209, - MTK_WDT_STA_SPM_RST = 1 << 1, - MTK_WDT_STA_SW_RST = 1 << 30, - MTK_WDT_STA_HW_RST = 1 << 31 -}; - -int mtk_wdt_init(void); - -#endif /* SOC_MEDIATEK_COMMON_WDT_H */ diff --git a/src/soc/mediatek/mt8173/wdt.c b/src/soc/mediatek/mt8173/wdt.c deleted file mode 100644 index bd2a614586..0000000000 --- a/src/soc/mediatek/mt8173/wdt.c +++ /dev/null @@ -1,63 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 MediaTek Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include - -static struct mtk_wdt_regs *const mtk_wdt = (void *)RGU_BASE; - -int mtk_wdt_init(void) -{ - uint32_t wdt_sta; - - /* Write Mode register will clear status register */ - wdt_sta = read32(&mtk_wdt->wdt_status); - - printk(BIOS_INFO, "WDT: Last reset was "); - if (wdt_sta & MTK_WDT_STA_HW_RST) { - printk(BIOS_INFO, "hardware watchdog\n"); - mark_watchdog_tombstone(); - } else if (wdt_sta & MTK_WDT_STA_SW_RST) - printk(BIOS_INFO, "normal software reboot\n"); - else if (wdt_sta & MTK_WDT_STA_SPM_RST) - printk(BIOS_INFO, "SPM reboot\n"); - else if (!wdt_sta) - printk(BIOS_INFO, "cold boot\n"); - else - printk(BIOS_INFO, "unexpected reset type: %#.8x\n", wdt_sta); - - /* Config watchdog reboot mode: - * Clearing bits: - * DUAL_MODE & IRQ: trigger reset instead of irq then reset. - * EXT_POL: select watchdog output signal as active low. - * ENABLE: disable watchdog on initialization. - * Setting bit EXTEN to enable watchdog output. - */ - clrsetbits_le32(&mtk_wdt->wdt_mode, - MTK_WDT_MODE_DUAL_MODE | MTK_WDT_MODE_IRQ | - MTK_WDT_MODE_EXT_POL | MTK_WDT_MODE_ENABLE, - MTK_WDT_MODE_EXTEN | MTK_WDT_MODE_KEY); - - return wdt_sta; -} - -void do_hard_reset(void) -{ - write32(&mtk_wdt->wdt_swrst, MTK_WDT_SWRST_KEY); -} -- cgit v1.2.3