From 53c83897c41b6dec5db2c5e814ca69cf721c22c2 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Fri, 21 May 2021 02:11:38 +0200 Subject: soc/amd/cezanne,picasso/reset: use byte I/O read for NCP_ERR NCP_ERR is a 1 byte register in I/O-space, so use inb and not inw. The variable the result gets assigned to is also a uint8_t. Signed-off-by: Felix Held Change-Id: I9fd8c139004111d6227c0316ba2a8b0281541654 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54736 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- src/soc/amd/cezanne/reset.c | 2 +- src/soc/amd/picasso/reset.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc') diff --git a/src/soc/amd/cezanne/reset.c b/src/soc/amd/cezanne/reset.c index d97f79eb20..b05c0b6c47 100644 --- a/src/soc/amd/cezanne/reset.c +++ b/src/soc/amd/cezanne/reset.c @@ -10,7 +10,7 @@ /* TODO: is NCP_ERR still valid? It appears reserved and always 0xff. b/184281092 */ void set_warm_reset_flag(void) { - uint8_t ncp = inw(NCP_ERR); + uint8_t ncp = inb(NCP_ERR); outb(NCP_ERR, ncp | NCP_WARM_BOOT); } diff --git a/src/soc/amd/picasso/reset.c b/src/soc/amd/picasso/reset.c index aae76bf4c6..84226ea6df 100644 --- a/src/soc/amd/picasso/reset.c +++ b/src/soc/amd/picasso/reset.c @@ -9,7 +9,7 @@ void set_warm_reset_flag(void) { - uint8_t ncp = inw(NCP_ERR); + uint8_t ncp = inb(NCP_ERR); outb(NCP_ERR, ncp | NCP_WARM_BOOT); } -- cgit v1.2.3