From 471c239ffe69c68575a640e9d29f2df74ea613bc Mon Sep 17 00:00:00 2001
From: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Date: Thu, 16 Jun 2022 14:12:02 +0800
Subject: soc/intel/xeon_sp: Define macro TOTAL_PADS

Define total GPIO pins as TOTAL_PADS.

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: Ic7c48415d1fa3067ac62520a542058e7cab45941
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65163
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
---
 src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/soc')

diff --git a/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h b/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
index 2049c3fcaf..6f3ddcd6bf 100644
--- a/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
+++ b/src/soc/intel/xeon_sp/include/soc/lewisburg_pch_gpio_defs.h
@@ -337,6 +337,8 @@
 
 #define NUM_GPIO_COM2_PADS	(GPD11 - GPD0 + 1)
 
+#define TOTAL_PADS		(GPD11 + 1)
+
 #define GPIO_NUM_PAD_CFG_REGS   2 /* DW0, DW1 */
 
 #define NUM_GPIO_COMx_GPI_REGS(n)	\
-- 
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