From 414d7e4642991696dc81fbcb7ac68fe75fa4bc12 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 11 Aug 2020 22:54:06 +0200 Subject: drivers/intel/fsp2_0: don't select FSP_USES_CB_STACK on FSP 2.0 platform soc/amd/picasso selected FSP_USES_CB_STACK even though it is FSP 2.0 based, so it doesn't reuse coreboot's stack, but sets up its own stack. In contrast to all other FSP 2.0 based platforms, this stack isn't in the CAR region, since AMD Picasso doesn't support CAR and the DRAM is already available when the x86 cores are released from reset. Selecting FSP_USES_CB_STACK ended up doing the right thing, but is semantically wrong. Instead of wrongly selecting FSP_USES_CB_STACK in soc/amd/picasso we take the corresponding code path if ENV_CACHE_AS_RAM is false which is only the case for non-CAR platforms. BUG=b:155501050 TEST=Timeless build results in an identical binary for amd/mandolin, asrock/h110m-dvs and intel/coffeelake_rvp11 which cover all 3 cases here. Change-Id: Icd0ff8e17a535e2c247793b64f4b0565887183d8 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/44406 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh Reviewed-by: Marshall Dawson --- src/soc/amd/picasso/Kconfig | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/soc') diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 8001b7a20c..1b83000d32 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -53,7 +53,6 @@ config CPU_SPECIFIC_OPTIONS select PLATFORM_USES_FSP2_0 select FSP_COMPRESS_FSP_M_LZMA select FSP_COMPRESS_FSP_S_LZMA - select FSP_USES_CB_STACK select UDK_2017_BINDING select HAVE_CF9_RESET select SUPPORT_CPU_UCODE_IN_CBFS @@ -377,7 +376,6 @@ config MAINBOARD_POWER_RESTORE config FSP_TEMP_RAM_SIZE hex - depends on FSP_USES_CB_STACK default 0x40000 help The amount of coreboot-allocated heap and stack usage by the FSP. -- cgit v1.2.3