From 40c740584bd86a535924c0b0337f9ef094f3d394 Mon Sep 17 00:00:00 2001 From: Naresh Solanki Date: Mon, 21 Aug 2023 13:14:27 +0200 Subject: soc/intel/xeon/spr: Improve RMT configuration Set EnforceDdrMemoryFreqPor to 0 for RMT builds. This is needed for proper functioning when EnforcePopulationPor is set to 1. Signed-off-by: Naresh Solanki Change-Id: Icf4fe01ac9b546830334717dbfa53782d2a85ba1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77339 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- src/soc/intel/xeon_sp/spr/romstage.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc') diff --git a/src/soc/intel/xeon_sp/spr/romstage.c b/src/soc/intel/xeon_sp/spr/romstage.c index 57f12c5d4d..8abac91de5 100644 --- a/src/soc/intel/xeon_sp/spr/romstage.c +++ b/src/soc/intel/xeon_sp/spr/romstage.c @@ -278,6 +278,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) mupd->FspmConfig.serialDebugMsgLvl = 0x3; mupd->FspmConfig.AllowedSocketsInParallel = 0x1; mupd->FspmConfig.EnforcePopulationPor = 0x1; + mupd->FspmConfig.EnforceDdrMemoryFreqPor = 0x0; } } -- cgit v1.2.3