From 3f11803075cc13e377287240734cf82654f48ade Mon Sep 17 00:00:00 2001 From: Po Xu Date: Tue, 4 Aug 2020 11:39:47 +0800 Subject: soc/mediatek: Move auxadc driver from MT8183 to common The auxadc (auxiliary analogue-to-digital conversion) is a unit to identify the plugged peripherals or measure the temperature or voltages. The MT8183 auxadc driver can be shared by multiple MediaTek SoCs so we should move it to the common folder. Signed-off-by: Po Xu Change-Id: Id4553e99c3578fa40e28b19a6e010b52650ba41e Reviewed-on: https://review.coreboot.org/c/coreboot/+/46390 Tested-by: build bot (Jenkins) Reviewed-by: Hung-Te Lin --- src/soc/mediatek/common/auxadc.c | 72 +++++++++++++++++++++ .../mediatek/common/include/soc/auxadc_common.h | 8 +++ src/soc/mediatek/mt8183/Makefile.inc | 8 +-- src/soc/mediatek/mt8183/auxadc.c | 73 ---------------------- src/soc/mediatek/mt8183/include/soc/auxadc.h | 6 +- 5 files changed, 88 insertions(+), 79 deletions(-) create mode 100644 src/soc/mediatek/common/auxadc.c create mode 100644 src/soc/mediatek/common/include/soc/auxadc_common.h delete mode 100644 src/soc/mediatek/mt8183/auxadc.c (limited to 'src/soc') diff --git a/src/soc/mediatek/common/auxadc.c b/src/soc/mediatek/common/auxadc.c new file mode 100644 index 0000000000..6dbf12bbe9 --- /dev/null +++ b/src/soc/mediatek/common/auxadc.c @@ -0,0 +1,72 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include + +static struct mtk_auxadc_regs *const mtk_auxadc = (void *)AUXADC_BASE; + +#define ADC_GE_A_SHIFT 10 +#define ADC_GE_A_MASK (0x3ff << ADC_GE_A_SHIFT) +#define ADC_OE_A_SHIFT 0 +#define ADC_OE_A_MASK (0x3ff << ADC_OE_A_SHIFT) +#define ADC_CALI_EN_A_SHIFT 20 +#define ADC_CALI_EN_A_MASK (0x1 << ADC_CALI_EN_A_SHIFT) + +static int cali_oe; +static int cali_ge; +static int calibrated = 0; +static void mt_auxadc_update_cali(void) +{ + uint32_t cali_reg; + int cali_ge_a; + int cali_oe_a; + + cali_reg = read32(&mtk_efuse->adc_cali_reg); + + if ((cali_reg & ADC_CALI_EN_A_MASK) != 0) { + cali_oe_a = (cali_reg & ADC_OE_A_MASK) >> ADC_OE_A_SHIFT; + cali_ge_a = (cali_reg & ADC_GE_A_MASK) >> ADC_GE_A_SHIFT; + cali_ge = cali_ge_a - 512; + cali_oe = cali_oe_a - 512; + } +} + +static uint32_t auxadc_get_rawdata(int channel) +{ + setbits32(&mtk_infracfg->module_sw_cg_1_clr, 1 << 10); + assert(wait_ms(300, !(read32(&mtk_auxadc->con2) & 0x1))); + + clrbits32(&mtk_auxadc->con1, 1 << channel); + assert(wait_ms(300, !(read32(&mtk_auxadc->data[channel]) & (1 << 12)))); + + setbits32(&mtk_auxadc->con1, 1 << channel); + udelay(25); + assert(wait_ms(300, read32(&mtk_auxadc->data[channel]) & (1 << 12))); + + uint32_t value = read32(&mtk_auxadc->data[channel]) & 0x0FFF; + + setbits32(&mtk_infracfg->module_sw_cg_1_set, 1 << 10); + + return value; +} + +unsigned int auxadc_get_voltage_uv(unsigned int channel) +{ + uint32_t raw_value; + assert(channel < 16); + + if (!calibrated) { + mt_auxadc_update_cali(); + calibrated = 1; + } + + /* 1.5V in 4096 steps */ + raw_value = auxadc_get_rawdata(channel); + raw_value = raw_value - cali_oe; + return (unsigned int)((int64_t)raw_value * 1500000 / (4096 + cali_ge)); +} diff --git a/src/soc/mediatek/common/include/soc/auxadc_common.h b/src/soc/mediatek/common/include/soc/auxadc_common.h new file mode 100644 index 0000000000..de2408fef1 --- /dev/null +++ b/src/soc/mediatek/common/include/soc/auxadc_common.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _MTK_ADC_COMMON_H +#define _MTK_ADC_COMMON_H + +/* Return voltage in uVolt */ +unsigned int auxadc_get_voltage_uv(unsigned int channel); +#endif diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc index b0dd48f7a4..43893c363d 100644 --- a/src/soc/mediatek/mt8183/Makefile.inc +++ b/src/soc/mediatek/mt8183/Makefile.inc @@ -1,7 +1,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y) -bootblock-y += auxadc.c bootblock-y += bootblock.c +bootblock-y += ../common/auxadc.c bootblock-y += ../common/gpio.c gpio.c bootblock-y += ../common/pll.c pll.c bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c @@ -15,7 +15,7 @@ decompressor-y += decompressor.c decompressor-y += ../common/mmu_operations.c decompressor-y += ../common/timer.c -verstage-y += auxadc.c +verstage-y += ../common/auxadc.c verstage-y += ../common/gpio.c gpio.c verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c verstage-y += mt8183.c @@ -24,7 +24,7 @@ verstage-y += ../common/timer.c verstage-y += ../common/uart.c verstage-y += ../common/wdt.c -romstage-y += auxadc.c +romstage-y += ../common/auxadc.c romstage-y += ../common/cbmem.c emi.c romstage-y += dramc_init_setting.c romstage-y += dramc_param.c @@ -44,8 +44,8 @@ romstage-y += ../common/timer.c romstage-y += ../common/uart.c romstage-y += ../common/wdt.c -ramstage-y += auxadc.c ramstage-y += emi.c +ramstage-y += ../common/auxadc.c ramstage-y += ../common/ddp.c ddp.c ramstage-y += ../common/dsi.c dsi.c ramstage-y += ../common/gpio.c gpio.c diff --git a/src/soc/mediatek/mt8183/auxadc.c b/src/soc/mediatek/mt8183/auxadc.c deleted file mode 100644 index 19c994872f..0000000000 --- a/src/soc/mediatek/mt8183/auxadc.c +++ /dev/null @@ -1,73 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include -#include -#include -#include -#include - -static struct mtk_auxadc_regs *const mtk_auxadc = (void *)AUXADC_BASE; - -#define ADC_GE_A_SHIFT 10 -#define ADC_GE_A_MASK (0x3ff << ADC_GE_A_SHIFT) -#define ADC_OE_A_SHIFT 0 -#define ADC_OE_A_MASK (0x3ff << ADC_OE_A_SHIFT) -#define ADC_CALI_EN_A_SHIFT 20 -#define ADC_CALI_EN_A_MASK (0x1 << ADC_CALI_EN_A_SHIFT) - -static int cali_oe; -static int cali_ge; -static int calibrated = 0; -static void mt_auxadc_update_cali(void) -{ - uint32_t cali_reg; - int cali_ge_a; - int cali_oe_a; - - cali_reg = read32(&mtk_efuse->adc_cali_reg); - - if ((cali_reg & ADC_CALI_EN_A_MASK) != 0) { - cali_oe_a = (cali_reg & ADC_OE_A_MASK) >> ADC_OE_A_SHIFT; - cali_ge_a = (cali_reg & ADC_GE_A_MASK) >> ADC_GE_A_SHIFT; - cali_ge = cali_ge_a - 512; - cali_oe = cali_oe_a - 512; - } -} -static uint32_t auxadc_get_rawdata(int channel) -{ - setbits32(&mt8183_infracfg->module_sw_cg_1_clr, 1 << 10); - assert(wait_ms(300, !(read32(&mtk_auxadc->con2) & 0x1))); - - clrbits32(&mtk_auxadc->con1, 1 << channel); - assert(wait_ms(300, !(read32(&mtk_auxadc->data[channel]) & (1 << 12)))); - - setbits32(&mtk_auxadc->con1, 1 << channel); - udelay(25); - assert(wait_ms(300, read32(&mtk_auxadc->data[channel]) & (1 << 12))); - - uint32_t value = read32(&mtk_auxadc->data[channel]) & 0x0FFF; - - setbits32(&mt8183_infracfg->module_sw_cg_1_set, 1 << 10); - - return value; -} - -int auxadc_get_voltage(unsigned int channel) -{ - uint32_t raw_value; - assert(channel < 16); - - if (!calibrated) { - mt_auxadc_update_cali(); - calibrated = 1; - } - - /* 1.5V in 4096 steps */ - raw_value = auxadc_get_rawdata(channel); - - raw_value = raw_value - cali_oe; - return (int)((int64_t)raw_value * 1500000 / (4096 + cali_ge)); -} diff --git a/src/soc/mediatek/mt8183/include/soc/auxadc.h b/src/soc/mediatek/mt8183/include/soc/auxadc.h index 18350d63f0..0e07de073c 100644 --- a/src/soc/mediatek/mt8183/include/soc/auxadc.h +++ b/src/soc/mediatek/mt8183/include/soc/auxadc.h @@ -3,6 +3,8 @@ #ifndef _MTK_ADC_H #define _MTK_ADC_H +#include +#include #include typedef struct mtk_auxadc_regs { @@ -16,6 +18,6 @@ typedef struct mtk_auxadc_regs { uint32_t misc; } mtk_auxadc_regs; -/* Return voltage in uVolt */ -int auxadc_get_voltage(unsigned int channel); +static struct mt8183_infracfg_regs *const mtk_infracfg = mt8183_infracfg; + #endif -- cgit v1.2.3