From 31218a4259708233c17fa8b09fa9d9c06ea1f2ad Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Mon, 30 Nov 2020 15:50:06 +0100 Subject: drivers/intel/fsp2_0: Fix running on x86_64 Add new Kconfig symbols to mark FSP binary as x86_32. Fix the FSP headers and replace void pointers by fixed sized integers depending on the used mode to compile the FSP. This issue has been reported here: https://github.com/intel/FSP/issues/59 This is necessary to run on x86_64, as pointers have different size. Add preprocessor error to warn that x86_64 FSP isn't supported by the current code. Tested on Intel Skylake. FSP-M no longer returns the error "Invalid Parameter". Change-Id: I6015005c4ee3fc2f361985cf8cff896bcefd04fb Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/coreboot/+/48174 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/amd/picasso/romstage.c | 2 +- src/soc/intel/quark/romstage/fsp_params.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc') diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index bc514561ac..1391536464 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -92,7 +92,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) FSP_M_CONFIG *mcfg = &mupd->FspmConfig; const struct soc_amd_picasso_config *config = config_of_soc(); - mupd->FspmArchUpd.NvsBufferPtr = soc_fill_mrc_cache(); + mupd->FspmArchUpd.NvsBufferPtr = (uintptr_t)soc_fill_mrc_cache(); mcfg->pci_express_base_addr = CONFIG_MMCONF_BASE_ADDRESS; mcfg->tseg_size = CONFIG_SMM_TSEG_SIZE; diff --git a/src/soc/intel/quark/romstage/fsp_params.c b/src/soc/intel/quark/romstage/fsp_params.c index efe3c10d00..11f70596da 100644 --- a/src/soc/intel/quark/romstage/fsp_params.c +++ b/src/soc/intel/quark/romstage/fsp_params.c @@ -84,7 +84,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version) /* Update the architectural UPD values. */ aupd = &fspm_upd->FspmArchUpd; aupd->BootLoaderTolumSize = cbmem_overhead_size(); - aupd->StackBase = (void *)(CONFIG_FSP_ESRAM_LOC - aupd->StackSize); + aupd->StackBase = (uintptr_t)(CONFIG_FSP_ESRAM_LOC - aupd->StackSize); aupd->BootMode = FSP_BOOT_WITH_FULL_CONFIGURATION; /* Display the ESRAM layout */ @@ -97,8 +97,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version) "+-------------------+ 0x%08x (CONFIG_FSP_ESRAM_LOC)\n", CONFIG_FSP_ESRAM_LOC); printk(BIOS_SPEW, "| FSP stack |\n"); - printk(BIOS_SPEW, "+-------------------+ %p\n", - aupd->StackBase); + printk(BIOS_SPEW, "+-------------------+ 0x%zx\n", + (size_t)aupd->StackBase); printk(BIOS_SPEW, "| |\n"); printk(BIOS_SPEW, "+-------------------+ %p\n", _car_unallocated_start); -- cgit v1.2.3