From 247dd0e1313e01990b3fdcd4a9e6f22d2518cad9 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Thu, 16 Mar 2023 18:31:13 +0530 Subject: soc/intel/meteorlake: Enable GPIO IOSTANDBY configuration Enable SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY so the pads can be configured with non-zero IOSSTATE values. TEST=Able to build and boot google/rex. GPIO debug print is showing GPIO PAD config DW1 bit[14:17] are getting programmed. Signed-off-by: Subrata Banik Change-Id: I9e63fe946d541769fa0ddbb23f902f9c905735c1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73757 Tested-by: build bot (Jenkins) Reviewed-by: Sukumar Ghorai Reviewed-by: Eric Lai --- src/soc/intel/meteorlake/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc') diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index f2d2700e80..b9b1df0f6f 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -63,6 +63,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE select SOC_INTEL_COMMON_BLOCK_DTT select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT + select SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY select SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_PCR select SOC_INTEL_COMMON_BLOCK_GPIO_PMODE_4BITS select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 -- cgit v1.2.3