From 24787ffe306fed78e295085102758f784e5be3d9 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 11 Dec 2020 16:48:39 +0100 Subject: soc/intel/elkhartlake: Drop unreferenced devicetree settings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No mainboard uses these settings, nor does SoC code. Drop them. Change-Id: Ia928c4bbddd1c160228a9af8faf5d4be787f73f8 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/48568 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Michael Niewöhner --- src/soc/intel/elkhartlake/chip.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h index 7cd29b4f40..37237bbbc1 100644 --- a/src/soc/intel/elkhartlake/chip.h +++ b/src/soc/intel/elkhartlake/chip.h @@ -132,17 +132,9 @@ struct soc_intel_elkhartlake_config { /* Enable if SD Card Power Enable Signal is Active High */ uint8_t SdCardPowerEnableActiveHigh; - /* Integrated Sensor */ - uint8_t PchIshEnable; - - /* Heci related */ - uint8_t Heci3Enabled; - /* Gfx related */ - uint8_t IgdDvmt50PreAlloc; uint8_t SkipExtGfxScan; - uint32_t GraphicsConfigPtr; uint8_t Device4Enable; /* HeciEnabled decides the state of Heci1 at end of boot -- cgit v1.2.3