From 1835bf0fd4b77ab3eae1fb085be1667d13ed3144 Mon Sep 17 00:00:00 2001 From: Keith Short Date: Thu, 16 May 2019 11:46:27 -0600 Subject: post_code: add post code for critical CBFS failures Add a new post code POST_INVALID_CBFS, used when coreboot fails to locate or validate a resource that is stored in CBFS. BUG=b:124401932 BRANCH=sarien TEST=build coreboot for sarien and arcada platforms Change-Id: If1c8b92889040f9acd6250f847db02626809a987 Signed-off-by: Keith Short Reviewed-on: https://review.coreboot.org/c/coreboot/+/32771 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/soc/intel/quark/romstage/fsp2_0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/soc') diff --git a/src/soc/intel/quark/romstage/fsp2_0.c b/src/soc/intel/quark/romstage/fsp2_0.c index 2ec16c9f34..e4abcc034a 100644 --- a/src/soc/intel/quark/romstage/fsp2_0.c +++ b/src/soc/intel/quark/romstage/fsp2_0.c @@ -116,7 +116,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *fspm_upd, uint32_t version) /* Locate the RMU data file in flash */ rmu_data = locate_rmu_file(&rmu_data_len); if (!rmu_data) - die("Microcode file (rmu.bin) not found."); + die_with_post_code(POST_INVALID_CBFS, + "Microcode file (rmu.bin) not found."); /* Locate the configuration data from devicetree.cb */ dev = pcidev_path_on_root(LPC_DEV_FUNC); -- cgit v1.2.3