From 0de0254a1fef88a8758e0bdc81a25101cd3c9ccd Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 13 Feb 2022 13:43:35 -0600 Subject: soc/intel/cnl: Move selection of DISABLE_HECI1_AT_PRE_BOOT back to mainboard Commit 805956bce [soc/intel/cnl: Use Kconfig to disable HECI1] moved HECI1 disablement out of mainboard devicetree and into SoC Kconfig, but in doing so inadvertently disabled HECI1 for Puff-based boards which previously had HECI1 enabled by default. To correct this, move the Kconfig selection back into the mainboard Kconfig, and set defaults to match values prior to refactoring in 805956bce. Test: run menuconfig for boards google/{drallion,hatch,puff,sarien} and ensure Disable HECI1 option defaults to selected for all except Puff. Change-Id: Idf7001fb8b0dd94677cf2b5527a61b7a29679492 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/61901 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Tim Wawrzynczak --- src/soc/intel/cannonlake/Kconfig | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/soc') diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 94f0b4835d..ea50970e0c 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -111,9 +111,6 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select UDK_2017_BINDING -config DISABLE_HECI1_AT_PRE_BOOT - default y if MAINBOARD_HAS_CHROMEOS - config MAX_CPUS int default 12 -- cgit v1.2.3