From 0cd338e6e489eacfedb8fab3ff161b1578d08f07 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Fri, 29 Jul 2016 14:07:30 -0600 Subject: Remove non-ascii & unprintable characters These non-ascii & unprintable characters aren't needed. Change-Id: I129f729f66d6a692de729d76971f7deb7a19c254 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/15977 Tested-by: build bot (Jenkins) Reviewed-by: Omar Pakker Reviewed-by: Paul Menzel Reviewed-by: Stefan Reinauer --- src/soc/broadcom/cygnus/ddr_init.c | 4 ++-- src/soc/intel/fsp_baytrail/acpi/irqroute.asl | 6 +++--- src/soc/intel/fsp_broadwell_de/acpi/irqroute.asl | 6 +++--- 3 files changed, 8 insertions(+), 8 deletions(-) (limited to 'src/soc') diff --git a/src/soc/broadcom/cygnus/ddr_init.c b/src/soc/broadcom/cygnus/ddr_init.c index b08e3c0a3c..abf034bc86 100644 --- a/src/soc/broadcom/cygnus/ddr_init.c +++ b/src/soc/broadcom/cygnus/ddr_init.c @@ -97,8 +97,8 @@ void PRE_SRX(void) readvalue = reg32_read ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL); reg32_write ((volatile uint32_t *)DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL, ( readvalue & ~(1 << DDR_PHY_BYTE_LANE_1_IDLE_PAD_CONTROL__IDDQ))); - // Turn on PHY_CONTROL AUTO_OEB ¨C not required - // Enable byte lane AUTO_DQ_RXENB_MODE: bits 18 and 19 of the byte lane IDLE_PAD_CONTROL ¨C already set 180114c8: 000f000a + // Turn on PHY_CONTROL AUTO_OEB C not required + // Enable byte lane AUTO_DQ_RXENB_MODE: bits 18 and 19 of the byte lane IDLE_PAD_CONTROL C already set 180114c8: 000f000a printk(BIOS_INFO, "\n....PLL power up.\n"); reg32_write((volatile uint32_t *)DDR_PHY_CONTROL_REGS_PLL_CONFIG, (reg32_read((volatile uint32_t *)DDR_PHY_CONTROL_REGS_PLL_CONFIG) & ~(1<