From be03903ffb076570a7aa8473a9eaeec90925d084 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 26 Jun 2021 14:11:52 +0300 Subject: soc/cavium,ti: Do resource transition MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I0b9bd00a5de4c2c8d91fa9d595d3ee313356048a Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/55916 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/soc/ti/am335x/soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/ti') diff --git a/src/soc/ti/am335x/soc.c b/src/soc/ti/am335x/soc.c index 6f1c7940b2..410b2d772f 100644 --- a/src/soc/ti/am335x/soc.c +++ b/src/soc/ti/am335x/soc.c @@ -6,7 +6,7 @@ static void soc_enable(struct device *dev) { - ram_resource_kb(dev, 0, (uintptr_t)_dram / KiB, CONFIG_DRAM_SIZE_MB * MiB / KiB); + ram_range(dev, 0, (uintptr_t)_dram, CONFIG_DRAM_SIZE_MB * (uint64_t)MiB); } struct chip_operations soc_ti_am335x_ops = { -- cgit v1.2.3