From ad7b2e23ab5954f150a4b2f62378f1e7133e56c9 Mon Sep 17 00:00:00 2001 From: Sam Lewis Date: Mon, 3 Aug 2020 20:18:29 +1000 Subject: cpu/ti/am335x: Move from cpu to soc in tree The AM335X is a SoC, so should be in the soc tree. This moves all the existing am335x code to soc/ and updates any references. It also adds a soc.c file as required for the ramstage. Change-Id: Ic1ccb0e9b9c24a8b211b723b5f4cc26cdd0eaaab Signed-off-by: Sam Lewis Reviewed-on: https://review.coreboot.org/c/coreboot/+/44378 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/soc/ti/am335x/pinmux.c | 171 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 171 insertions(+) create mode 100644 src/soc/ti/am335x/pinmux.c (limited to 'src/soc/ti/am335x/pinmux.c') diff --git a/src/soc/ti/am335x/pinmux.c b/src/soc/ti/am335x/pinmux.c new file mode 100644 index 0000000000..8cf888405f --- /dev/null +++ b/src/soc/ti/am335x/pinmux.c @@ -0,0 +1,171 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include "pinmux.h" + +#include + +static struct am335x_pinmux_regs *regs = + (struct am335x_pinmux_regs *)(uintptr_t)AM335X_PINMUX_REG_ADDR; + +void am335x_pinmux_uart0(void) +{ + write32(®s->uart0_rxd, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->uart0_txd, MODE(0) | PULLUDEN); +} + +void am335x_pinmux_uart1(void) +{ + write32(®s->uart1_rxd, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->uart1_txd, MODE(0) | PULLUDEN); +} + +void am335x_pinmux_uart2(void) +{ + // UART2_RXD + write32(®s->spi0_sclk, MODE(1) | PULLUP_EN | RXACTIVE); + // UART2_TXD + write32(®s->spi0_d0, MODE(1) | PULLUDEN); +} + +void am335x_pinmux_uart3(void) +{ + // UART3_RXD + write32(®s->spi0_cs1, MODE(1) | PULLUP_EN | RXACTIVE); + // UART3_TXD + write32(®s->ecap0_in_pwm0_out, MODE(1) | PULLUDEN); +} + +void am335x_pinmux_uart4(void) +{ + // UART4_RXD + write32(®s->gpmc_wait0, MODE(6) | PULLUP_EN | RXACTIVE); + // UART4_TXD + write32(®s->gpmc_wpn, MODE(6) | PULLUDEN); +} + +void am335x_pinmux_uart5(void) +{ + // UART5_RXD + write32(®s->lcd_data9, MODE(4) | PULLUP_EN | RXACTIVE); + // UART5_TXD + write32(®s->lcd_data8, MODE(4) | PULLUDEN); +} + +void am335x_pinmux_mmc0(int cd, int sk_evm) +{ + write32(®s->mmc0_dat0, MODE(0) | RXACTIVE | PULLUP_EN); + write32(®s->mmc0_dat1, MODE(0) | RXACTIVE | PULLUP_EN); + write32(®s->mmc0_dat2, MODE(0) | RXACTIVE | PULLUP_EN); + write32(®s->mmc0_dat3, MODE(0) | RXACTIVE | PULLUP_EN); + write32(®s->mmc0_clk, MODE(0) | RXACTIVE | PULLUP_EN); + write32(®s->mmc0_cmd, MODE(0) | RXACTIVE | PULLUP_EN); + if (!sk_evm) { + // MMC0_WP + write32(®s->mcasp0_aclkr, MODE(4) | RXACTIVE); + } + if (cd) { + // MMC0_CD + write32(®s->spi0_cs1, MODE(5) | RXACTIVE | PULLUP_EN); + } +} + +void am335x_pinmux_mmc1(void) +{ + // MMC1_DAT0 + write32(®s->gpmc_ad0, MODE(1) | RXACTIVE | PULLUP_EN); + // MMC1_DAT1 + write32(®s->gpmc_ad1, MODE(1) | RXACTIVE | PULLUP_EN); + // MMC1_DAT2 + write32(®s->gpmc_ad2, MODE(1) | RXACTIVE | PULLUP_EN); + // MMC1_DAT3 + write32(®s->gpmc_ad3, MODE(1) | RXACTIVE | PULLUP_EN); + // MMC1_CLK + write32(®s->gpmc_csn1, MODE(2) | RXACTIVE | PULLUP_EN); + // MMC1_CMD + write32(®s->gpmc_csn2, MODE(2) | RXACTIVE | PULLUP_EN); + // MMC1_WP + write32(®s->gpmc_csn0, MODE(7) | RXACTIVE | PULLUP_EN); + // MMC1_CD + write32(®s->gpmc_advn_ale, MODE(7) | RXACTIVE | PULLUP_EN); +} + +void am335x_pinmux_i2c0(void) +{ + write32(®s->i2c0_sda, MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL); + write32(®s->i2c0_scl, MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL); +} + +void am335x_pinmux_i2c1(void) +{ + // I2C_DATA + write32(®s->spi0_d1, MODE(2) | RXACTIVE | PULLUDEN | SLEWCTRL); + // I2C_SCLK + write32(®s->spi0_cs0, MODE(2) | RXACTIVE | PULLUDEN | SLEWCTRL); +} + +void am335x_pinmux_spi0(void) +{ + write32(®s->spi0_sclk, MODE(0) | RXACTIVE | PULLUDEN); + write32(®s->spi0_d0, MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN); + write32(®s->spi0_d1, MODE(0) | RXACTIVE | PULLUDEN); + write32(®s->spi0_cs0, MODE(0) | RXACTIVE | PULLUDEN | PULLUP_EN); +} + +void am335x_pinmux_gpio0_7(void) +{ + write32(®s->ecap0_in_pwm0_out, MODE(7) | PULLUDEN); +} + +void am335x_pinmux_rgmii1(void) +{ + write32(®s->mii1_txen, MODE(2)); + write32(®s->mii1_rxdv, MODE(2) | RXACTIVE); + write32(®s->mii1_txd0, MODE(2)); + write32(®s->mii1_txd1, MODE(2)); + write32(®s->mii1_txd2, MODE(2)); + write32(®s->mii1_txd3, MODE(2)); + write32(®s->mii1_txclk, MODE(2)); + write32(®s->mii1_rxclk, MODE(2) | RXACTIVE); + write32(®s->mii1_rxd0, MODE(2) | RXACTIVE); + write32(®s->mii1_rxd1, MODE(2) | RXACTIVE); + write32(®s->mii1_rxd2, MODE(2) | RXACTIVE); + write32(®s->mii1_rxd3, MODE(2) | RXACTIVE); +} + +void am335x_pinmux_mii1(void) +{ + write32(®s->mii1_rxerr, MODE(0) | RXACTIVE); + write32(®s->mii1_txen, MODE(0)); + write32(®s->mii1_rxdv, MODE(0) | RXACTIVE); + write32(®s->mii1_txd0, MODE(0)); + write32(®s->mii1_txd1, MODE(0)); + write32(®s->mii1_txd2, MODE(0)); + write32(®s->mii1_txd3, MODE(0)); + write32(®s->mii1_txclk, MODE(0) | RXACTIVE); + write32(®s->mii1_rxclk, MODE(0) | RXACTIVE); + write32(®s->mii1_rxd0, MODE(0) | RXACTIVE); + write32(®s->mii1_rxd1, MODE(0) | RXACTIVE); + write32(®s->mii1_rxd2, MODE(0) | RXACTIVE); + write32(®s->mii1_rxd3, MODE(0) | RXACTIVE); + write32(®s->mdio_data, MODE(0) | RXACTIVE | PULLUP_EN); + write32(®s->mdio_clk, MODE(0) | PULLUP_EN); +} + +void am335x_pinmux_nand(void) +{ + write32(®s->gpmc_ad0, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->gpmc_ad1, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->gpmc_ad2, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->gpmc_ad3, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->gpmc_ad4, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->gpmc_ad5, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->gpmc_ad6, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->gpmc_ad7, MODE(0) | PULLUP_EN | RXACTIVE); + write32(®s->gpmc_wait0, MODE(0) | RXACTIVE | PULLUP_EN); + write32(®s->gpmc_wpn, MODE(7) | PULLUP_EN | RXACTIVE); + write32(®s->gpmc_csn0, MODE(0) | PULLUDEN); + write32(®s->gpmc_advn_ale, MODE(0) | PULLUDEN); + write32(®s->gpmc_oen_ren, MODE(0) | PULLUDEN); + write32(®s->gpmc_wen, MODE(0) | PULLUDEN); + write32(®s->gpmc_be0n_cle, MODE(0) | PULLUDEN); +} -- cgit v1.2.3