From b5353965e1b7eff860faaa3312728a935311a8c6 Mon Sep 17 00:00:00 2001 From: Sam Lewis Date: Mon, 3 Aug 2020 21:14:26 +1000 Subject: soc/ti/am335x: Enable MMU in bootblock Enables the MMU primarily to allow the unaligned word reads that the FMAP code requires. Without enabling this, the chip gets data access exceptions. Enabling the MMU also gives some advantages in allowing the icache and dcache to be enabled, so is probably worth doing regardless. Change-Id: Ic571570cc44b0696ea61cc76e3bce7167a3256cf Signed-off-by: Sam Lewis Reviewed-on: https://review.coreboot.org/c/coreboot/+/44382 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/soc/ti/am335x/bootblock.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) (limited to 'src/soc/ti/am335x/bootblock.c') diff --git a/src/soc/ti/am335x/bootblock.c b/src/soc/ti/am335x/bootblock.c index 985e1a1a0b..11bc4593e1 100644 --- a/src/soc/ti/am335x/bootblock.c +++ b/src/soc/ti/am335x/bootblock.c @@ -4,13 +4,25 @@ #include #include +#include + +#define SRAM_START ((uintptr_t)_sram / MiB) +#define SRAM_END (DIV_ROUND_UP((uintptr_t)_esram, MiB)) + +#define DRAM_START ((uintptr_t)_dram / MiB) +#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB) void bootblock_soc_init(void) { - uint32_t sctlr; + mmu_init(); + + /* Map everything strongly ordered by default */ + mmu_config_range(0, 4096, DCACHE_OFF); + + mmu_config_range(SRAM_START, SRAM_END - SRAM_START, + DCACHE_WRITEBACK); + + mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK); - /* enable dcache */ - sctlr = read_sctlr(); - sctlr |= SCTLR_C; - write_sctlr(sctlr); + dcache_mmu_enable(); } -- cgit v1.2.3