From 90fd0727c7c3be143caef7fb397c093a3151ba3b Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Mon, 29 Oct 2018 14:25:05 +0100 Subject: soc/sifive/fu540: Simplify UART refclk calculation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit clock_get_coreclk_khz() already detects whether the PLL or the input clock (hfclk) is used. Tested on HiFive Unleashed. Change-Id: I264977b0de0b81ef74a014984b6d33638ab33f4b Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/c/29334 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Hug Reviewed-by: Patrick Rudolph --- src/soc/sifive/fu540/clock.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/sifive/fu540/clock.c') diff --git a/src/soc/sifive/fu540/clock.c b/src/soc/sifive/fu540/clock.c index 20dce23a64..a8b61f1760 100644 --- a/src/soc/sifive/fu540/clock.c +++ b/src/soc/sifive/fu540/clock.c @@ -242,6 +242,7 @@ void clock_init(void) } #endif /* ENV_ROMSTAGE */ +/* Get the core clock's frequency, in KHz */ int clock_get_coreclk_khz(void) { if (read32(&prci->coreclksel) & PRCI_CORECLK_MASK) -- cgit v1.2.3