From 90fd0727c7c3be143caef7fb397c093a3151ba3b Mon Sep 17 00:00:00 2001 From: Jonathan Neuschäfer Date: Mon, 29 Oct 2018 14:25:05 +0100 Subject: soc/sifive/fu540: Simplify UART refclk calculation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit clock_get_coreclk_khz() already detects whether the PLL or the input clock (hfclk) is used. Tested on HiFive Unleashed. Change-Id: I264977b0de0b81ef74a014984b6d33638ab33f4b Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/c/29334 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Hug Reviewed-by: Patrick Rudolph --- src/soc/sifive/fu540/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/sifive/fu540/Makefile.inc') diff --git a/src/soc/sifive/fu540/Makefile.inc b/src/soc/sifive/fu540/Makefile.inc index fef859d9e4..4f62f3ed62 100644 --- a/src/soc/sifive/fu540/Makefile.inc +++ b/src/soc/sifive/fu540/Makefile.inc @@ -17,6 +17,7 @@ bootblock-y += uart.c bootblock-y += clint.c bootblock-y += media.c bootblock-y += bootblock.c +bootblock-y += clock.c romstage-y += uart.c romstage-y += clint.c -- cgit v1.2.3