From 200f7b7ee13b98d726bd0e5de2792a14c558a7ea Mon Sep 17 00:00:00 2001 From: Ronald G Minnich Date: Fri, 15 Mar 2024 21:56:20 -0700 Subject: arch/riscv: add Kconfig variable RISCV_SOC_HAS_MENVCFG Older parts do not have the menvcfg csr. Provide a Kconfig variable, default y, to enable it. Check the variable in the payload code, when coreboot SBI is used, and print out if it is enabled. The SiFive FU540 and FU740 do not support this register; set the variable to n for those parts. Add constants for this new CSR. Change-Id: I6ea302a5acd98f6941bf314da89dd003ab20b596 Signed-off-by: Ronald G Minnich Reviewed-on: https://review.coreboot.org/c/coreboot/+/81425 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) Reviewed-by: Martin L Roth --- src/soc/sifive/fu540/Kconfig | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/soc/sifive/fu540/Kconfig') diff --git a/src/soc/sifive/fu540/Kconfig b/src/soc/sifive/fu540/Kconfig index 97931fd09c..fb15762204 100644 --- a/src/soc/sifive/fu540/Kconfig +++ b/src/soc/sifive/fu540/Kconfig @@ -48,4 +48,9 @@ config OPENSBI_PLATFORM config OPENSBI_TEXT_START hex default 0x80000000 + +config RISCV_SOC_HAS_MENVCFG + bool + default n + endif -- cgit v1.2.3