From 5b63dc1ff822e56ebabcb60fa4afd46f7f7e08c3 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Tue, 23 Dec 2014 23:31:30 +1100 Subject: soc/samsung/exynos: Make 'ps_hold_setup()' static Change-Id: I272fea9c2767c341e8a545bf7a9ac18eefa2bda5 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/7917 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks --- src/soc/samsung/exynos5250/power.c | 1 + src/soc/samsung/exynos5250/setup.h | 2 -- src/soc/samsung/exynos5420/power.c | 3 ++- src/soc/samsung/exynos5420/setup.h | 2 -- 4 files changed, 3 insertions(+), 5 deletions(-) (limited to 'src/soc/samsung') diff --git a/src/soc/samsung/exynos5250/power.c b/src/soc/samsung/exynos5250/power.c index fb45dc0dd4..27089c66d9 100644 --- a/src/soc/samsung/exynos5250/power.c +++ b/src/soc/samsung/exynos5250/power.c @@ -24,6 +24,7 @@ #include #include "power.h" +/* Set the PS-Hold drive value */ static void ps_hold_setup(void) { /* Set PS-Hold high */ diff --git a/src/soc/samsung/exynos5250/setup.h b/src/soc/samsung/exynos5250/setup.h index c65747b775..274ceb1ad0 100644 --- a/src/soc/samsung/exynos5250/setup.h +++ b/src/soc/samsung/exynos5250/setup.h @@ -741,8 +741,6 @@ void dmc_config_prech(struct mem_timings *mem, struct exynos5_dmc *dmc); */ void dmc_config_memory(struct mem_timings *mem, struct exynos5_dmc *dmc); -/* Set the PS-Hold drive value */ -void ps_hold_setup(void); /* * Reset the DLL. This function is common between DDR3 and LPDDR2. * However, the reset value is different. So we are passing a flag diff --git a/src/soc/samsung/exynos5420/power.c b/src/soc/samsung/exynos5420/power.c index a7e5262e12..7d947121de 100644 --- a/src/soc/samsung/exynos5420/power.c +++ b/src/soc/samsung/exynos5420/power.c @@ -26,7 +26,8 @@ #include "power.h" #include "setup.h" -void ps_hold_setup(void) +/* Set the PS-Hold drive value */ +static void ps_hold_setup(void) { /* Set PS-Hold high */ setbits_le32(&exynos_power->ps_hold_ctrl, diff --git a/src/soc/samsung/exynos5420/setup.h b/src/soc/samsung/exynos5420/setup.h index e0a7d1b0a8..e7b5bd2e08 100644 --- a/src/soc/samsung/exynos5420/setup.h +++ b/src/soc/samsung/exynos5420/setup.h @@ -874,8 +874,6 @@ void dmc_config_prech(struct mem_timings *mem, struct exynos5_dmc *dmc); */ void dmc_config_memory(struct mem_timings *mem, struct exynos5_dmc *dmc); -/* Set the PS-Hold drive value */ -void ps_hold_setup(void); /* * Reset the DLL. This function is common between DDR3 and LPDDR2. * However, the reset value is different. So we are passing a flag -- cgit v1.2.3