From 2f37bd65518865688b9234afce0d467508d6f465 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Thu, 19 Feb 2015 14:51:15 -0800 Subject: arm(64): Globally replace writel(v, a) with write32(a, v) This patch is a raw application of the following spatch to src/: @@ expression A, V; @@ - writel(V, A) + write32(A, V) @@ expression A, V; @@ - writew(V, A) + write16(A, V) @@ expression A, V; @@ - writeb(V, A) + write8(A, V) @@ expression A; @@ - readl(A) + read32(A) @@ expression A; @@ - readb(A) + read8(A) BRANCH=none BUG=chromium:444723 TEST=None (depends on next patch) Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27 Signed-off-by: Patrick Georgi Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6 Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42 Original-Signed-off-by: Julius Werner Original-Reviewed-on: https://chromium-review.googlesource.com/254864 Reviewed-on: http://review.coreboot.org/9836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/samsung/exynos5420/spi.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'src/soc/samsung/exynos5420/spi.c') diff --git a/src/soc/samsung/exynos5420/spi.c b/src/soc/samsung/exynos5420/spi.c index 6ceb92edd2..3d71f79529 100644 --- a/src/soc/samsung/exynos5420/spi.c +++ b/src/soc/samsung/exynos5420/spi.c @@ -69,9 +69,9 @@ static inline struct exynos_spi_slave *to_exynos_spi(struct spi_slave *slave) static void spi_sw_reset(struct exynos_spi *regs, int word) { - const uint32_t orig_mode_cfg = readl(®s->mode_cfg); + const uint32_t orig_mode_cfg = read32(®s->mode_cfg); uint32_t mode_cfg = orig_mode_cfg; - const uint32_t orig_swap_cfg = readl(®s->swap_cfg); + const uint32_t orig_swap_cfg = read32(®s->swap_cfg); uint32_t swap_cfg = orig_swap_cfg; mode_cfg &= ~(SPI_MODE_CH_WIDTH_MASK | SPI_MODE_BUS_WIDTH_MASK); @@ -89,9 +89,9 @@ static void spi_sw_reset(struct exynos_spi *regs, int word) } if (mode_cfg != orig_mode_cfg) - writel(mode_cfg, ®s->mode_cfg); + write32(®s->mode_cfg, mode_cfg); if (swap_cfg != orig_swap_cfg) - writel(swap_cfg, ®s->swap_cfg); + write32(®s->swap_cfg, swap_cfg); clrbits_le32(®s->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON); setbits_le32(®s->ch_cfg, SPI_CH_RST); @@ -106,7 +106,7 @@ void spi_init(void) static void exynos_spi_init(struct exynos_spi *regs) { // Set FB_CLK_SEL. - writel(SPI_FB_DELAY_180, ®s->fb_clk); + write32(®s->fb_clk, SPI_FB_DELAY_180); // CPOL: Active high. clrbits_le32(®s->ch_cfg, SPI_CH_CPOL_L); @@ -157,10 +157,10 @@ static void spi_transfer(struct exynos_spi *regs, void *in, const void *out, out_bytes = in_bytes = packets * width; spi_sw_reset(regs, width == 4); - writel(packets | SPI_PACKET_CNT_EN, ®s->pkt_cnt); + write32(®s->pkt_cnt, packets | SPI_PACKET_CNT_EN); while (out_bytes || in_bytes) { - uint32_t spi_sts = readl(®s->spi_sts); + uint32_t spi_sts = read32(®s->spi_sts); int rx_lvl = ((spi_sts >> 15) & 0x1ff); int tx_lvl = ((spi_sts >> 6) & 0x1ff); @@ -171,13 +171,13 @@ static void spi_transfer(struct exynos_spi *regs, void *in, const void *out, memcpy(&data, outb, width); outb += width; } - writel(data, ®s->tx_data); + write32(®s->tx_data, data); out_bytes -= width; } if (rx_lvl >= width) { - uint32_t data = readl(®s->rx_data); + uint32_t data = read32(®s->rx_data); if (inb) { memcpy(inb, &data, width); -- cgit v1.2.3