From e5bad5cd3d828eba06f1db66f43948f966e7b0e0 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Sat, 5 Sep 2015 10:27:12 -0500 Subject: verstage: use common program.ld for linking There's no reason to have a separate verstage.ld now that there is a unified stage linking strategy. Moreover verstage support is throughout the code base as it is so bring in those link script macros into the common memlayout.h as that removes one more specific thing a board/chipset needs to do in order to turn on verstage. BUG=chrome-os-partner:44827 BRANCH=None TEST=None Change-Id: I1195e06e06c1f81a758f68a026167689c19589dd Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11516 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/samsung/exynos5250/include/soc/memlayout.ld | 1 - 1 file changed, 1 deletion(-) (limited to 'src/soc/samsung/exynos5250') diff --git a/src/soc/samsung/exynos5250/include/soc/memlayout.ld b/src/soc/samsung/exynos5250/include/soc/memlayout.ld index 3b5b034d2a..4469078969 100644 --- a/src/soc/samsung/exynos5250/include/soc/memlayout.ld +++ b/src/soc/samsung/exynos5250/include/soc/memlayout.ld @@ -18,7 +18,6 @@ */ #include -#include #include -- cgit v1.2.3