From 1ed0c8c0b221962855b6f547cc663c506b9cb5c6 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Mon, 20 Oct 2014 13:16:29 -0700 Subject: exynos5250: Change all SoC headers to system This patch aligns exynos5250 to the new SoC header include scheme. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Tested with whole series. Compiled Daisy. Change-Id: I39805c0346e117a0f9b2667763ecaa428f0f55a8 Signed-off-by: Patrick Georgi Original-Commit-Id: db6762f0c8425371d9860f908a5cefdeee8d1abc Original-Change-Id: Ic358061ddcbbe7d83a95ca11247b8b505b20491d Original-Signed-off-by: Julius Werner Original-Reviewed-on: https://chromium-review.googlesource.com/224500 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/9323 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Stefan Reinauer --- src/soc/samsung/exynos5250/memlayout.ld | 46 --------------------------------- 1 file changed, 46 deletions(-) delete mode 100644 src/soc/samsung/exynos5250/memlayout.ld (limited to 'src/soc/samsung/exynos5250/memlayout.ld') diff --git a/src/soc/samsung/exynos5250/memlayout.ld b/src/soc/samsung/exynos5250/memlayout.ld deleted file mode 100644 index 010bb7b64d..0000000000 --- a/src/soc/samsung/exynos5250/memlayout.ld +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include - -#include - -/* - * Note: The BootROM loads the 8K BL1 at [0x2020000:0x2022000), so the bootblock - * must be placed after that. After the handoff, the space can be reclaimed. - */ - -SECTIONS -{ - SRAM_START(0x2020000) - /* 13K hole, includes BL1 */ - BOOTBLOCK(0x2023400, 32K) - /* 19K hole */ - ROMSTAGE(0x2030000, 128K) - /* 32K hole */ - TTB(0x2058000, 16K) - PRERAM_CBFS_CACHE(0x205C000, 96K) - STACK(0x2074000, 16K) - SRAM_END(0x2078000) - - DRAM_START(0x40000000) - RAMSTAGE(0x40000000, 128K) - POSTRAM_CBFS_CACHE(0x41000000, 8M) - DMA_COHERENT(0x77300000, 1M) -} -- cgit v1.2.3