From cd49cce7b70e80b4acc49b56bb2bb94370b4d867 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 5 Mar 2019 16:53:33 -0800 Subject: coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) This patch is a raw application of find src/ -type f | xargs sed -i -e 's/IS_ENABLED\s*(CONFIG_/CONFIG(/g' Change-Id: I6262d6d5c23cabe23c242b4f38d446b74fe16b88 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/c/coreboot/+/31774 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/rockchip/common/gpio.c | 2 +- src/soc/rockchip/common/pwm.c | 2 +- src/soc/rockchip/rk3399/clock.c | 2 +- src/soc/rockchip/rk3399/soc.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc/rockchip') diff --git a/src/soc/rockchip/common/gpio.c b/src/soc/rockchip/common/gpio.c index bb85acf8cc..fa0990b10b 100644 --- a/src/soc/rockchip/common/gpio.c +++ b/src/soc/rockchip/common/gpio.c @@ -30,7 +30,7 @@ static void gpio_set_dir(gpio_t gpio, enum gpio_dir dir) static void gpio_set_pull(gpio_t gpio, enum gpio_pull pull) { u32 pull_val = gpio_get_pull_val(gpio, pull); - if (is_pmu_gpio(gpio) && IS_ENABLED(CONFIG_SOC_ROCKCHIP_RK3288)) + if (is_pmu_gpio(gpio) && CONFIG(SOC_ROCKCHIP_RK3288)) clrsetbits_le32(gpio_grf_reg(gpio), 3 << (gpio.idx * 2), pull_val << (gpio.idx * 2)); else diff --git a/src/soc/rockchip/common/pwm.c b/src/soc/rockchip/common/pwm.c index 2ac4bfcdce..e4045a8937 100644 --- a/src/soc/rockchip/common/pwm.c +++ b/src/soc/rockchip/common/pwm.c @@ -67,7 +67,7 @@ void pwm_init(u32 id, u32 period_ns, u32 duty_ns) { unsigned long period, duty; -#if IS_ENABLED(CONFIG_SOC_ROCKCHIP_RK3288) +#if CONFIG(SOC_ROCKCHIP_RK3288) /*use rk pwm*/ write32(&rk3288_grf->soc_con2, RK_SETBITS(1 << 0)); #endif diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c index 586eaf0d12..5252232f39 100644 --- a/src/soc/rockchip/rk3399/clock.c +++ b/src/soc/rockchip/rk3399/clock.c @@ -660,7 +660,7 @@ void rkclk_configure_ddr(unsigned int hz) } rkclk_set_pll(&cru_ptr->dpll_con[0], &dpll_cfg); - if (IS_ENABLED(CONFIG_RK3399_SPREAD_SPECTRUM_DDR)) + if (CONFIG(RK3399_SPREAD_SPECTRUM_DDR)) rkclk_set_dpllssc(&dpll_cfg); } diff --git a/src/soc/rockchip/rk3399/soc.c b/src/soc/rockchip/rk3399/soc.c index 6e5e1a7f96..65b791d5a3 100644 --- a/src/soc/rockchip/rk3399/soc.c +++ b/src/soc/rockchip/rk3399/soc.c @@ -49,7 +49,7 @@ static void soc_init(struct device *dev) */ mmio_resource(dev, 1, (TZRAM_BASE / KiB), (TZRAM_SIZE / KiB)); - if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) && display_init_required()) + if (CONFIG(MAINBOARD_DO_NATIVE_VGA_INIT) && display_init_required()) rk_display_init(dev); else printk(BIOS_INFO, "Display initialization disabled.\n"); -- cgit v1.2.3