From 50df52244ebeb019c9e4f78a1197d7200f759b51 Mon Sep 17 00:00:00 2001 From: Lin Huang Date: Wed, 15 Jun 2016 17:43:40 +0800 Subject: rockchip/rk3399: Clean up voltage rail settings The CENTER LOGIC should always be 0.9V and can not be adjusted, so use duty_ns = 2860 to correct CENTER LOGIC to 0.9V. And now DDR seems to run stable at 800MHz on the gru board. BRANCH=none BUG=chrome-os-partner:54144, chrome-os-partner:53208 TEST=run "stressapptest -M 1024 -s 1000" and pass Change-Id: Ia900e248c10ddd0ab630446a324cc0446c0fa49b Signed-off-by: Martin Roth Original-Commit-Id: f4fb1cefb59ac4099cef8b32a68ed9222e708478 Original-Change-Id: I2238da6c17908d09bc284b321d796901317ed9ef Original-Signed-off-by: Lin Huang Original-Signed-off-by: Douglas Anderson Original-Reviewed-on: https://chromium-review.googlesource.com/352772 Reviewed-on: https://review.coreboot.org/15297 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/rockchip/rk3399/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/rockchip/rk3399/Makefile.inc') diff --git a/src/soc/rockchip/rk3399/Makefile.inc b/src/soc/rockchip/rk3399/Makefile.inc index 990edcba2c..28c633835a 100644 --- a/src/soc/rockchip/rk3399/Makefile.inc +++ b/src/soc/rockchip/rk3399/Makefile.inc @@ -49,6 +49,7 @@ romstage-y += romstage.c romstage-y += tsadc.c romstage-y += usb.c romstage-y += gpio.c +romstage-y += saradc.c romstage-y += ../common/gpio.c ################################################################################ -- cgit v1.2.3