From 82ba4d092b729d0063a22d445f315d08ad7a3e07 Mon Sep 17 00:00:00 2001 From: huang lin Date: Sat, 16 Aug 2014 10:49:32 +0800 Subject: rk3288: add cpu and chip BUG=chrome-os-partner:29778 TEST=Build coreboot Change-Id: I4c1864171e56a81e8eda95a15ca6a6bc1adc7a70 Signed-off-by: Patrick Georgi Original-Commit-Id: 814af4b653432295cb6d7222af4a6e5a8d9dfbf6 Original-Change-Id: I1a986fbc8b3737bae655207dd89865dd39aecf87 Original-Signed-off-by: Jeffy Chen Original-Reviewed-on: https://chromium-review.googlesource.com/209467 Original-Reviewed-by: David Hendricks Original-Reviewed-by: Julius Werner Original-Commit-Queue: Lin Huang Original-Tested-by: Lin Huang Reviewed-on: http://review.coreboot.org/8866 Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) --- src/soc/rockchip/rk3288/Makefile.inc | 1 + src/soc/rockchip/rk3288/chip.h | 47 +++++++++++++++++++++++++++ src/soc/rockchip/rk3288/clock.c | 2 +- src/soc/rockchip/rk3288/cpu.h | 30 ----------------- src/soc/rockchip/rk3288/gpio.c | 2 +- src/soc/rockchip/rk3288/grf.h | 2 +- src/soc/rockchip/rk3288/i2c.c | 2 +- src/soc/rockchip/rk3288/sdram.c | 2 +- src/soc/rockchip/rk3288/soc.c | 63 ++++++++++++++++++++++++++++++++++++ src/soc/rockchip/rk3288/soc.h | 37 +++++++++++++++++++++ 10 files changed, 153 insertions(+), 35 deletions(-) create mode 100755 src/soc/rockchip/rk3288/chip.h delete mode 100644 src/soc/rockchip/rk3288/cpu.h create mode 100644 src/soc/rockchip/rk3288/soc.c create mode 100644 src/soc/rockchip/rk3288/soc.h (limited to 'src/soc/rockchip/rk3288') diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc index 446aa7842d..1a438e8e3c 100644 --- a/src/soc/rockchip/rk3288/Makefile.inc +++ b/src/soc/rockchip/rk3288/Makefile.inc @@ -41,6 +41,7 @@ romstage-y += spi.c romstage-y += media.c romstage-y += sdram.c +ramstage-y += soc.c ramstage-y += cbmem.c ramstage-y += timer.c ramstage-y += monotonic_timer.c diff --git a/src/soc/rockchip/rk3288/chip.h b/src/soc/rockchip/rk3288/chip.h new file mode 100755 index 0000000000..a7fded09cb --- /dev/null +++ b/src/soc/rockchip/rk3288/chip.h @@ -0,0 +1,47 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SOC_ROCKCHIP_RK3288_CHIP_H__ +#define __SOC_ROCKCHIP_RK3288_CHIP_H__ + +struct soc_rockchip_rk3288_config { + int screen_type; + int lvds_format; + int out_face; + int clock_frequency; + int hactive; + int vactive; + int hback_porch; + int hfront_porch; + int vback_porch; + int vfront_porch; + int hsync_len; + int vsync_len; + int hsync_active; + int vsync_active; + int de_active; + int pixelclk_active; + int swap_rb; + int swap_rg; + int swap_gb; + int lcd_en_gpio; + int lcd_cs_gpio; +}; + +#endif /* __SOC_ROCKCHIP_RK3288_CHIP_H__ */ diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c index b194b4c10e..d2ef0aa6d2 100755 --- a/src/soc/rockchip/rk3288/clock.c +++ b/src/soc/rockchip/rk3288/clock.c @@ -26,7 +26,7 @@ #include "clock.h" #include "grf.h" #include "addressmap.h" -#include "cpu.h" +#include "soc.h" struct pll_div { u32 nr; diff --git a/src/soc/rockchip/rk3288/cpu.h b/src/soc/rockchip/rk3288/cpu.h deleted file mode 100644 index 9bcfe3e1e9..0000000000 --- a/src/soc/rockchip/rk3288/cpu.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Rockchip Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __SOC_ROCKCHIP_RK3288_CPU_H__ -#define __SOC_ROCKCHIP_RK3288_CPU_H__ - -#include - -#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | set) -#define RK_SETBITS(set) RK_CLRSETBITS(0, set) -#define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0) - -#endif /* __SOC_ROCKCHIP_RK3288_CPU_H__ */ - diff --git a/src/soc/rockchip/rk3288/gpio.c b/src/soc/rockchip/rk3288/gpio.c index 46ef2eb114..2d1ae15d6a 100755 --- a/src/soc/rockchip/rk3288/gpio.c +++ b/src/soc/rockchip/rk3288/gpio.c @@ -20,7 +20,7 @@ #include #include #include -#include "cpu.h" +#include "soc.h" #include "gpio.h" #include "pmu.h" diff --git a/src/soc/rockchip/rk3288/grf.h b/src/soc/rockchip/rk3288/grf.h index b035bb9dd3..e0dfc02361 100755 --- a/src/soc/rockchip/rk3288/grf.h +++ b/src/soc/rockchip/rk3288/grf.h @@ -22,7 +22,7 @@ #include #include "addressmap.h" -#include "cpu.h" +#include "soc.h" struct rk3288_grf_gpio_lh { u32 l; diff --git a/src/soc/rockchip/rk3288/i2c.c b/src/soc/rockchip/rk3288/i2c.c index 80ad253e59..dab0178092 100755 --- a/src/soc/rockchip/rk3288/i2c.c +++ b/src/soc/rockchip/rk3288/i2c.c @@ -29,7 +29,7 @@ #include "addressmap.h" #include "grf.h" -#include "cpu.h" +#include "soc.h" #define RETRY_COUNT 3 /* 100000us = 100ms */ #define I2C_TIMEOUT_US 100000 diff --git a/src/soc/rockchip/rk3288/sdram.c b/src/soc/rockchip/rk3288/sdram.c index 4f8b268398..7ac84f0c93 100644 --- a/src/soc/rockchip/rk3288/sdram.c +++ b/src/soc/rockchip/rk3288/sdram.c @@ -25,7 +25,7 @@ #include "clock.h" #include "sdram.h" #include "grf.h" -#include "cpu.h" +#include "soc.h" #include "pmu.h" struct rk3288_ddr_pctl_regs { diff --git a/src/soc/rockchip/rk3288/soc.c b/src/soc/rockchip/rk3288/soc.c new file mode 100644 index 0000000000..0985c0843f --- /dev/null +++ b/src/soc/rockchip/rk3288/soc.c @@ -0,0 +1,63 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "soc.h" +#include "chip.h" + +static void soc_enable(device_t dev) +{ + ram_resource(dev, 0, RAM_BASE_KB, RAM_SIZE_KB); +} + +static void soc_init(device_t dev) +{ + +} + +static void soc_noop(device_t dev) +{ + +} + +static struct device_operations soc_ops = { + .read_resources = soc_noop, + .set_resources = soc_noop, + .enable_resources = soc_enable, + .init = soc_init, + .scan_bus = 0, +}; + +static void enable_rk3288_dev(device_t dev) +{ + dev->ops = &soc_ops; +} + +struct chip_operations soc_rockchip_rk3288_ops = { + CHIP_NAME("SOC Rockchip 3288") + .enable_dev = enable_rk3288_dev, +}; diff --git a/src/soc/rockchip/rk3288/soc.h b/src/soc/rockchip/rk3288/soc.h new file mode 100644 index 0000000000..3121fd872d --- /dev/null +++ b/src/soc/rockchip/rk3288/soc.h @@ -0,0 +1,37 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SOC_ROCKCHIP_RK3288_CPU_H__ +#define __SOC_ROCKCHIP_RK3288_CPU_H__ + +#include + +#define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | set) +#define RK_SETBITS(set) RK_CLRSETBITS(0, set) +#define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0) + +#define FB_SIZE_KB 4096 +#define RAM_BASE_KB (CONFIG_SYS_SDRAM_BASE >> 10) +#define RAM_SIZE_KB (CONFIG_DRAM_SIZE_MB << 10UL) + +static inline u32 get_fb_base_kb(void) +{ + return RAM_BASE_KB + RAM_SIZE_KB - FB_SIZE_KB; +} +#endif -- cgit v1.2.3