From 817e455d38d9ec6730fa27ee13e9ae123b1dc632 Mon Sep 17 00:00:00 2001 From: huang lin Date: Tue, 26 Aug 2014 17:31:28 +0800 Subject: add make_idb.py & update bootblock BUG=chrome-os-partner:29778 TEST=Build coreboot Change-Id: Ica7b2bf2cf649c2731933ce59a263692bb2c0282 Signed-off-by: Patrick Georgi Original-Commit-Id: ba9c36daedc749748f45e68a84f8c34c636adb1c Original-Change-Id: Ia0e4e39d4391674f25e630b40913eb99ff3f75c4 Original-Signed-off-by: Jeffy Chen Original-Signed-off-by: huang lin Original-Reviewed-on: https://chromium-review.googlesource.com/209427 Original-Reviewed-by: David Hendricks Original-Commit-Queue: Julius Werner Reviewed-on: http://review.coreboot.org/8862 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/rockchip/rk3288/Kconfig | 4 ++++ src/soc/rockchip/rk3288/Makefile.inc | 10 ++++++++++ src/soc/rockchip/rk3288/bootblock.c | 8 ++++++++ 3 files changed, 22 insertions(+) (limited to 'src/soc/rockchip/rk3288') diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig index 0fadefd283..359ce2f57d 100644 --- a/src/soc/rockchip/rk3288/Kconfig +++ b/src/soc/rockchip/rk3288/Kconfig @@ -54,6 +54,10 @@ config BOOTBLOCK_CPU_INIT # 0xFF71_3000 CBFS mapping cache (20K) # 0xFF71_7FFF End of iRAM. +config SYS_SRAM_BASE + hex "SRAM base address" + default 0xFF700000 + config SYS_SDRAM_BASE hex "SDRAM base address" default 0x00000000 diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc index e0f32242a5..7d5b3a5767 100644 --- a/src/soc/rockchip/rk3288/Makefile.inc +++ b/src/soc/rockchip/rk3288/Makefile.inc @@ -17,6 +17,8 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## +IDBTOOL = util/rockchip/make_idb.py + #bootblock-y += bootblock.c bootblock-y += cbmem.c bootblock-y += timer.c @@ -43,3 +45,11 @@ ramstage-y += clock.c ramstage-y += spi.c ramstage-y += media.c ramstage-$(CONFIG_DRIVERS_UART) += uart.c + +$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf + cp $< $@ + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf "Generating: $(subst $(obj)/,,$(@))\n" + @mkdir -p $(dir $@) + @$(IDBTOOL) --from=$< --to=$@ --enable-align diff --git a/src/soc/rockchip/rk3288/bootblock.c b/src/soc/rockchip/rk3288/bootblock.c index 04afae5529..76a91d234d 100644 --- a/src/soc/rockchip/rk3288/bootblock.c +++ b/src/soc/rockchip/rk3288/bootblock.c @@ -19,12 +19,20 @@ #include #include +#include #include #include "timer.h" #include "clock.h" +#include "grf.h" +#include "spi.h" static void bootblock_cpu_init(void) { + writel(IOMUX_UART2, &rk3288_grf->iomux_uart2); + writel(IOMUX_SPI2_CSCLK, &rk3288_grf->iomux_spi2csclk); + writel(IOMUX_SPI2_TXRX, &rk3288_grf->iomux_spi2txrx); rk3288_init_timer(); + console_init(); rkclk_init(); + rockchip_spi_init(CONFIG_BOOT_MEDIA_SPI_BUS); } -- cgit v1.2.3