From 7a453ebed2b87780100391b7ab78d41337890a66 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Mon, 20 Oct 2014 13:14:55 -0700 Subject: rk3288: Change all SoC headers to system This patch is the start of a series to change all non-x86 SoC-specific headers to be included as instead of the old or "header.h". It will add an include/soc/ directory under every src/soc/vendor/chip/ and append the .../include/ part of that to the global include path. This matches the usage of for architecture-specific headers and had already been done for some headers on Tegra. It has the advantage that a source file which does not know the specific SoC used (e.g. Tegra files common for multiple chips, or a global include file) can still include SoC-specific headers and access macros/types defined there. It also makes the includes for mainboard files more readable, and reduces the chance to pull in a wrong header when copying mainboard sources to use a different-related SoC (e.g. using a Tegra124 mainboard as template for a Tegra132 one). For easier maintainability, every SoC family is modified individually. This patch starts out by changing Rk3288. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Whole series: compared binary images for Daisy, Nyan_Blaze, Rush_Ryu, Storm, Urara and Veyron_Pinky. Confirmed that they are byte-for-byte identical except for timestamps, hashes, and __LINE__ macro replacements. Compile-tested individual patches. Change-Id: I4d74a0c56be278e591a9cf43f93e9900e41f4319 Signed-off-by: Patrick Georgi Original-Commit-Id: 4ad8b6d2e0280428aa9742f0f7b723c00857334a Original-Change-Id: I415b8dbe735e572d4ae2cb1df62d66bcce386fff Original-Signed-off-by: Julius Werner Original-Reviewed-on: https://chromium-review.googlesource.com/222025 Reviewed-on: http://review.coreboot.org/9349 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/rockchip/rk3288/memlayout.ld | 49 ------------------------------------ 1 file changed, 49 deletions(-) delete mode 100644 src/soc/rockchip/rk3288/memlayout.ld (limited to 'src/soc/rockchip/rk3288/memlayout.ld') diff --git a/src/soc/rockchip/rk3288/memlayout.ld b/src/soc/rockchip/rk3288/memlayout.ld deleted file mode 100644 index 2ddb6a6077..0000000000 --- a/src/soc/rockchip/rk3288/memlayout.ld +++ /dev/null @@ -1,49 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include - -#include - -/* Note: The BootROM will jump to 0xFF704004 after loading bootblock, - * so the bootblock loading address must be at 0xFF704004. - */ -SECTIONS -{ - DRAM_START(0x00000000) - RAMSTAGE(0x00200000, 128K) - POSTRAM_CBFS_CACHE(0x01000000, 1M) - DMA_COHERENT(0x10000000, 2M) - - SRAM_START(0xFF700000) - TTB(0xFF700000, 16K) - BOOTBLOCK(0xFF704004, 15K - 4) - TTB_SUBTABLES(0xFF707c00, 1K) - VBOOT2_WORK(0xFF708000, 16K) - OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C000, 40K) - PRERAM_CBFS_CACHE(0xFF716000, 4K) - STACK(0xFF717000, 4K) - SRAM_END(0xFF718000) - - /* 4K of special SRAM in PMU power domain. Careful: only supports 32-bit - * wide write accesses! Only use with MMU and writeback mapping. */ - SYMBOL(pmu_sram, 0xFF720000) - SYMBOL(epmu_sram, 0xFF721000) -} -- cgit v1.2.3