From 68f42be887fa0d98400babf30c1738e580d05f67 Mon Sep 17 00:00:00 2001 From: Yakir Yang Date: Wed, 29 Apr 2015 10:08:12 -0500 Subject: rockchip/rk3288: add support for hdmi display this is an brief hdmi driver which config with simple display parameter, const encoder input & output color format and 8bit color depth, and only 48KHz audio support. what's more to prevent TV have not show an right things before coreboot switch to kernel space, we have to add an terrible 2s delay to driver (2s come from test many times), cause we have to wait TV to respond (we got no flag to check whether it is ready). BUG=chrome-os-partner:40337 TEST=Booted Veyron Jerry and display normal BRANCH=None Change-Id: Icd33467e95de6219e1b614616f0112afc52097b6 Signed-off-by: Patrick Georgi Original-Commit-Id: 7e5b699aff75a579116aae63d858c834b2f648e8 Original-Change-Id: Iedc87c011c5b62ce5f16a296dd9c3e0c2eaba59b Original-Signed-off-by: Yakir Yang Original-Reviewed-on: https://chromium-review.googlesource.com/272565 Original-Reviewed-by: Daniel Kurtz Original-Commit-Queue: Lin Huang Original-Tested-by: Lin Huang Reviewed-on: http://review.coreboot.org/10625 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/rockchip/rk3288/chip.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/rockchip/rk3288/chip.h') diff --git a/src/soc/rockchip/rk3288/chip.h b/src/soc/rockchip/rk3288/chip.h index 5684520d2c..3a6b14d213 100644 --- a/src/soc/rockchip/rk3288/chip.h +++ b/src/soc/rockchip/rk3288/chip.h @@ -29,6 +29,7 @@ struct soc_rockchip_rk3288_config { u32 bl_power_on_udelay; u32 bl_pwm_to_enable_udelay; u32 framebuffer_bits_per_pixel; + u32 vop_mode; }; #endif /* __SOC_ROCKCHIP_RK3288_CHIP_H__ */ -- cgit v1.2.3