From 74bb41275326cd34046454ab5a06bd7a17d5f887 Mon Sep 17 00:00:00 2001 From: Shunqian Zheng Date: Tue, 17 May 2016 14:00:04 +0800 Subject: rockchip/rk3399: Fix pinctrl pull bias settings The pull bias settings for GPIO0_A, GPIO0_B, GPIO2_C and GPIO2_D are different from the other GPIO banks. This patch adds a callback function to get the GPIO pull value of each SoC(rk3288 and rk3399) so we can still use the common GPIO driver. BRANCH=none BUG=chrome-os-partner:53251 TEST=Jerry and Gru still boot Change-Id: I2a00b7ffd2699190582f5f50a1e21b61c500bf4f Signed-off-by: Martin Roth Original-Commit-Id: 46d5fa7297693216a2da9bcf15ccce4af796e80e Original-Change-Id: If53f47181bdc235a1ccfefeeb2a77e0eb0e3b1ca Original-Signed-off-by: Shunqian Zheng Original-Reviewed-on: https://chromium-review.googlesource.com/358110 Original-Commit-Ready: Julius Werner Original-Tested-by: Julius Werner Original-Reviewed-by: Julius Werner Reviewed-on: https://review.coreboot.org/15587 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/rockchip/common/include/soc/gpio.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'src/soc/rockchip/common/include') diff --git a/src/soc/rockchip/common/include/soc/gpio.h b/src/soc/rockchip/common/include/soc/gpio.h index 55eb41d980..2c72435065 100644 --- a/src/soc/rockchip/common/include/soc/gpio.h +++ b/src/soc/rockchip/common/include/soc/gpio.h @@ -72,4 +72,14 @@ int is_pmu_gpio(gpio_t gpio); /* Return the io addr of gpio register */ void *gpio_grf_reg(gpio_t gpio); + +enum { + PULLNONE = 0, + PULLUP, + PULLDOWN +}; + +/* The gpio pull bias setting may be different between SoCs */ +u32 gpio_get_pull_val(gpio_t gpio, u32 pull); + #endif -- cgit v1.2.3