From 8eb59d8122d2e0b27760e98133731ede159f229f Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 20 Feb 2024 12:43:29 +0100 Subject: soc/qualcomm/sc7{1,2}80: Increase early stages size for clang Clang builds slightly larger binaries so increase the section. The qcsdi is used for an external blob that is currently not in use so reducing the size is fine for now. Change-Id: Ide01233f209613678c5408f1afab19415c1071be Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/80639 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/qualcomm/sc7180/memlayout.ld | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc/qualcomm/sc7180/memlayout.ld') diff --git a/src/soc/qualcomm/sc7180/memlayout.ld b/src/soc/qualcomm/sc7180/memlayout.ld index adc9a0b0f9..9c500c2b78 100644 --- a/src/soc/qualcomm/sc7180/memlayout.ld +++ b/src/soc/qualcomm/sc7180/memlayout.ld @@ -23,7 +23,7 @@ SECTIONS AOPSRAM_END(0x0B100000) SSRAM_START(0x14680000) - OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 104K) + OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 112K) REGION(qcsdi, 0x1469E000, 55K, 4K) REGION(modem_id, 0x146ABD00, 4, 4) SSRAM_END(0x146AE000) @@ -31,9 +31,9 @@ SECTIONS BSRAM_START(0x14800000) REGION(pbl_timestamps, 0x14800000, 83K, 4K) WATCHDOG_TOMBSTONE(0x14814FFC, 4) - BOOTBLOCK(0x14815000, 48K) - TPM_LOG(0x14821000, 2K) - PRERAM_CBFS_CACHE(0x14821800, 60K) + BOOTBLOCK(0x14815000, 52K) + TPM_LOG(0x14822000, 2K) + PRERAM_CBFS_CACHE(0x14822800, 56K) PRERAM_CBMEM_CONSOLE(0x14830800, 32K) TIMESTAMP(0x14838800, 1K) TTB(0x14839000, 56K) -- cgit v1.2.3