From 6fde4c56b08250590c392ecbad0b6e067633d5c4 Mon Sep 17 00:00:00 2001 From: Ravi Kumar Bokka Date: Tue, 25 Aug 2020 15:47:59 +0530 Subject: sc7180: report hardware watchdog reset after reboot add WATCHDOG_TOMBSTONE in memlayout.ld Change-Id: I57ece39ff3d49f2bab259cbd92ab039a49323119 Signed-off-by: Ravi Kumar Bokka Reviewed-on: https://review.coreboot.org/c/coreboot/+/44868 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/qualcomm/sc7180/include/soc/clock.h | 8 +++++++- src/soc/qualcomm/sc7180/include/soc/watchdog.h | 8 ++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) create mode 100644 src/soc/qualcomm/sc7180/include/soc/watchdog.h (limited to 'src/soc/qualcomm/sc7180/include') diff --git a/src/soc/qualcomm/sc7180/include/soc/clock.h b/src/soc/qualcomm/sc7180/include/soc/clock.h index 62e2a34174..b303efefc1 100644 --- a/src/soc/qualcomm/sc7180/include/soc/clock.h +++ b/src/soc/qualcomm/sc7180/include/soc/clock.h @@ -28,6 +28,8 @@ #define AOP_RESET_SHFT 0 #define RCG_MODE_DUAL_EDGE 2 +#define WDOG_RESET_BIT_MASK 1 + #define SCALE_FREQ_SHFT 11 struct sc7180_clock { @@ -125,9 +127,13 @@ check_member(sc7180_gcc, usb3_phy_prim_bcr, 0x50000); check_member(sc7180_gcc, apcs_clk_br_en1, 0x52008); struct sc7180_aoss { - u8 _res[0x5002c]; + u8 _res0[0x50020]; + u32 aoss_cc_reset_status; + u8 _res1[0x5002C - 0x50024]; u32 aoss_cc_apcs_misc; }; +check_member(sc7180_aoss, aoss_cc_reset_status, 0x50020); +check_member(sc7180_aoss, aoss_cc_apcs_misc, 0x5002C); struct sc7180_disp_cc { u8 _res0[0x2004]; diff --git a/src/soc/qualcomm/sc7180/include/soc/watchdog.h b/src/soc/qualcomm/sc7180/include/soc/watchdog.h new file mode 100644 index 0000000000..c5ddb55bba --- /dev/null +++ b/src/soc/qualcomm/sc7180/include/soc/watchdog.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_QUALCOMM_SC7180_WDOG_H__ +#define _SOC_QUALCOMM_SC7180_WDOG_H__ + +void check_wdog(void); + +#endif /* _SOC_QUALCOMM_SC7180_WDOG_H__ */ -- cgit v1.2.3