From 634c783d1fbee4a9dee7a04c8d2e21d8b6d18e3c Mon Sep 17 00:00:00 2001
From: Akash Asthana <akashast@codeaurora.org>
Date: Mon, 29 Jul 2019 18:11:15 +0530
Subject: sc7180: Add SPI-NOR support

This implements the SPI-NOR driver for the Qualcomm QSPI core.

Developer/Reviewer, be aware of this patch from Napali:
https://review.coreboot.org/c/coreboot/+/27483/58

Change-Id: I2eb8cf90aa4559541ba293b3fd2870896bed20b7
Signed-off-by: Akash Asthana <akashast@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35501
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/qualcomm/sc7180/bootblock.c | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'src/soc/qualcomm/sc7180/bootblock.c')

diff --git a/src/soc/qualcomm/sc7180/bootblock.c b/src/soc/qualcomm/sc7180/bootblock.c
index bf80bff706..4f97d76c9b 100644
--- a/src/soc/qualcomm/sc7180/bootblock.c
+++ b/src/soc/qualcomm/sc7180/bootblock.c
@@ -16,9 +16,11 @@
 #include <bootblock_common.h>
 #include <soc/clock.h>
 #include <soc/mmu.h>
+#include <soc/qspi.h>
 
 void bootblock_soc_init(void)
 {
 	sc7180_mmu_init();
 	clock_init();
+	quadspi_init(25 * MHz);
 }
-- 
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