From 1f60f971fc89ef841e81b978964b38278d597b1d Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Thu, 19 Feb 2015 14:43:59 -0800 Subject: arm(64): Change write32() argument order to match x86 This patch changes the argument order for the (now temporarily unused) write32() accessor macro (and equivalents for other lengths) from (value, address) to (address, value) in order to conform with the equivalent on x86. Also removes one remaining use of write32() on ARM that slipped through since coccinelle doesn't inspect header files. BRANCH=none BUG=chromium:444723 TEST=Compiled Cosmos, Daisy, Blaze, Pit, Ryu, Storm and Pinky. Change-Id: Id5739b144f6a5cfd40958ea68510dcf0b89fbfa9 Signed-off-by: Patrick Georgi Original-Commit-Id: f02cae8b04f2042530bafc91346d11bb666aa42d Original-Change-Id: Ia91c2c19d8444e853a2fc12590a52c2b6447a1b9 Original-Signed-off-by: Julius Werner Original-Reviewed-on: https://chromium-review.googlesource.com/254863 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/9835 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/qualcomm/ipq806x/include/soc/iomap.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/qualcomm/ipq806x') diff --git a/src/soc/qualcomm/ipq806x/include/soc/iomap.h b/src/soc/qualcomm/ipq806x/include/soc/iomap.h index 412ff77c35..f2500f1cbf 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/iomap.h +++ b/src/soc/qualcomm/ipq806x/include/soc/iomap.h @@ -44,8 +44,8 @@ macros for read/write. Hence, special macros for readl_i and writel_i are included to do this in one place for all occurrences in vendor code */ -#define readl_i(a) read32((const void *)(a)) -#define writel_i(v,a) write32(v,(void *)a) +#define readl_i(a) readl((const void *)(a)) +#define writel_i(v,a) writel(v,(void *)a) #define clrsetbits_le32_i(addr, clear, set) \ clrsetbits_le32(((void *)(addr)), (clear), (set)) -- cgit v1.2.3