From db3e2f0931a52bee6e59d09df572fd0bfb481ff9 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Wed, 9 Apr 2014 19:23:54 -0700 Subject: ipq8064: Make clock code build in coreboot Include clock.c in the appropriate coreboot stages, modify the code to build cleanly. Use proper pointer cast in .h files. BUG=chrome-os-partner:27784 TEST='emerge-storm coreboot' still succeeds Original-Change-Id: I227c871b17e571f6a1db3ada3821dbb1ee884e59 Original-Signed-off-by: Vadim Bendebury Original-Reviewed-on: https://chromium-review.googlesource.com/196407 (cherry picked from commit 75decceccd97298974891bb98b796eccfe11f46c) Signed-off-by: Marc Jones Change-Id: I7d44464d4ca8153e84407fc05a25e2e79e74901e Reviewed-on: http://review.coreboot.org/7271 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks --- src/soc/qualcomm/ipq806x/include/iomap.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/qualcomm/ipq806x/include/iomap.h') diff --git a/src/soc/qualcomm/ipq806x/include/iomap.h b/src/soc/qualcomm/ipq806x/include/iomap.h index 8642410616..8a4155ce6b 100644 --- a/src/soc/qualcomm/ipq806x/include/iomap.h +++ b/src/soc/qualcomm/ipq806x/include/iomap.h @@ -52,7 +52,7 @@ #define MSM_GPT_BASE (MSM_TMR_BASE + 0x04) #define MSM_DGT_BASE (MSM_TMR_BASE + 0x24) -#define GPT_REG(off) (((uint8_t *)(MSM_GPT_BASE)) + (off)) +#define GPT_REG(off) ((void *)(MSM_GPT_BASE + (off))) #define DGT_REG(off) (MSM_DGT_BASE + (off)) #define APCS_WDT0_EN (MSM_TMR_BASE + 0x0040) -- cgit v1.2.3