From 765705789213e1914cad540bb7868d2154cdbedf Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 19 Mar 2014 14:29:48 -0700 Subject: soc/qualcomm: Add generic support skeleton for ipq806x Skeleton for soc ipq806x Old-Change-Id: I92a8d592d762f59665e15d1a7fc6cc73dc74c296 Signed-off-by: Furquan Shaikh Reviewed-on: https://chromium-review.googlesource.com/190723 Reviewed-by: Vadim Bendebury Commit-Queue: Furquan Shaikh Tested-by: Furquan Shaikh (cherry picked from commit e71d45733d86e77717fd2f592ef06113246db911) soc/ipq806x: Disable LPAE mode. LPAE (large physical address extension) is not available on this SOC core, do not enable it. Old-Change-Id: I9e9ad1aeaf613f04987c0c306a574085042d0e7b Signed-off-by: Deepa Dinamani Signed-off-by: Vadim Bendebury Reviewed-on: https://chromium-review.googlesource.com/198023 Reviewed-by: deepa dinamani (cherry picked from commit e6e12c39efd54e4fcbd444134bf30e211948a71b) Squashed 2 commits for the Qualcomm ipq806x SOC. Change-Id: I14521d3b2844ddd68112882de81453ce8d19fc16 Signed-off-by: Isaac Christensen Reviewed-on: http://review.coreboot.org/6963 Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/qualcomm/ipq806x/Kconfig | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 src/soc/qualcomm/ipq806x/Kconfig (limited to 'src/soc/qualcomm/ipq806x/Kconfig') diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig new file mode 100644 index 0000000000..fcf8ccdeae --- /dev/null +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -0,0 +1,22 @@ +config SOC_QC_IPQ806X + select ARCH_BOOTBLOCK_ARMV4 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 + bool + default n + +if SOC_QC_IPQ806X + +config BOOTBLOCK_ROM_OFFSET + hex + default 0x0 + +config CBFS_HEADER_ROM_OFFSET + hex "offset of master CBFS header in ROM" + default 0x18000 + +config CBFS_ROM_OFFSET + hex "offset of CBFS data in ROM" + default 0x18080 + +endif -- cgit v1.2.3