From 1485c3040b1c4ab4b204ebaae94e2023ff30db1b Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Wed, 28 May 2014 10:49:51 -0700 Subject: storm: modify memory layout MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is an interim change (before EFS is enabled), align ROM and RAM stages so that they have enough room and do not step over each other. BUG=chrome-os-partner:27784 TEST=manual . booted coreboot successfully on ap148 Original-Change-Id: I6e1710ac7ca494a69aea5ba3b117bfd882aded26 Original-Signed-off-by: Vadim Bendebury Original-Reviewed-on: https://chromium-review.googlesource.com/202046 Original-Reviewed-by: David Hendricks Original-Reviewed-by: Trevor Bourget (cherry picked from commit f1fd4e3f9d699cc694cf7840c169db9bbe9193b6) Signed-off-by: Marc Jones Change-Id: I9861d34a8bdd6963afbeed7fca7fda8a891ec481 Reviewed-on: http://review.coreboot.org/8012 Reviewed-by: Kyösti Mälkki Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/soc/qualcomm/ipq806x/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/qualcomm/ipq806x/Kconfig') diff --git a/src/soc/qualcomm/ipq806x/Kconfig b/src/soc/qualcomm/ipq806x/Kconfig index 3752c166a6..19d5236546 100644 --- a/src/soc/qualcomm/ipq806x/Kconfig +++ b/src/soc/qualcomm/ipq806x/Kconfig @@ -44,11 +44,11 @@ config BOOTBLOCK_BASE config ROMSTAGE_BASE hex - default 0x40608000 + default 0x40620000 config RAMSTAGE_BASE hex - default 0x4060c000 + default 0x40640000 config SYS_SDRAM_BASE hex -- cgit v1.2.3