From 775f833c559b59737a0c69c669f5d754cc820d05 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Tue, 14 Jul 2015 12:00:28 -0700 Subject: tegra lp0: fix checkpatch errors The checkpatch.pl scripts complains about the placing of the inline keyword: ERROR: inline keyword should sit between storage class and type Signed-off-by: Stefan Reinauer BUG=chrome-os-partner:38073 BRANCH=none TEST=repo upload works ;) Change-Id: Ibd2b8a437eda2fc720f8fc32c5821bae3be41d12 Signed-off-by: Patrick Georgi Original-Commit-Id: d20c0d34240966d5ae39c1667d4486b4341e183b Original-Change-Id: I36d600c4677c622c334d849bf260323592a8a4fc Original-Reviewed-on: https://chromium-review.googlesource.com/285543 Original-Reviewed-by: Furquan Shaikh Original-Commit-Queue: Stefan Reinauer Original-Tested-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/11048 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Patrick Georgi --- src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c | 8 ++++---- src/soc/nvidia/tegra132/lp0/tegra_lp0_resume.c | 8 ++++---- src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c | 8 ++++---- 3 files changed, 12 insertions(+), 12 deletions(-) (limited to 'src/soc/nvidia') diff --git a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c index e8cd5716f4..afb01e5369 100644 --- a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c +++ b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c @@ -270,22 +270,22 @@ static inline void __attribute__((always_inline)) for (;;); } -inline static uint32_t read32(const void *addr) +static inline uint32_t read32(const void *addr) { return *(volatile uint32_t *)addr; } -inline static void write32(void *addr, uint32_t val) +static inline void write32(void *addr, uint32_t val) { *(volatile uint32_t *)addr = val; } -inline static void setbits32(uint32_t bits, void *addr) +static inline void setbits32(uint32_t bits, void *addr) { write32(addr, read32(addr) | bits); } -inline static void clrbits32(uint32_t bits, void *addr) +static inline void clrbits32(uint32_t bits, void *addr) { write32(addr, read32(addr) & ~bits); } diff --git a/src/soc/nvidia/tegra132/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra132/lp0/tegra_lp0_resume.c index 621c4b72e3..da60c4ba22 100644 --- a/src/soc/nvidia/tegra132/lp0/tegra_lp0_resume.c +++ b/src/soc/nvidia/tegra132/lp0/tegra_lp0_resume.c @@ -249,22 +249,22 @@ static inline void __attribute__((always_inline)) for (;;); } -inline static uint32_t read32(const void *addr) +static inline uint32_t read32(const void *addr) { return *(volatile uint32_t *)addr; } -inline static void write32(void *addr, uint32_t val) +static inline void write32(void *addr, uint32_t val) { *(volatile uint32_t *)addr = val; } -inline static void setbits32(uint32_t bits, void *addr) +static inline void setbits32(uint32_t bits, void *addr) { write32(addr, read32(addr) | bits); } -inline static void clrbits32(uint32_t bits, void *addr) +static inline void clrbits32(uint32_t bits, void *addr) { write32(addr, read32(addr) & ~bits); } diff --git a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c index dc61cbac67..cf9c21299c 100644 --- a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c +++ b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c @@ -408,22 +408,22 @@ static inline void __attribute__((always_inline)) for (;;); } -inline static uint32_t read32(const void *addr) +static inline uint32_t read32(const void *addr) { return *(volatile uint32_t *)addr; } -inline static void write32(uint32_t val, void *addr) +static inline void write32(uint32_t val, void *addr) { *(volatile uint32_t *)addr = val; } -inline static void setbits32(uint32_t bits, void *addr) +static inline void setbits32(uint32_t bits, void *addr) { write32(addr, read32(addr) | bits); } -inline static void clrbits32(uint32_t bits, void *addr) +static inline void clrbits32(uint32_t bits, void *addr) { write32(addr, read32(addr) & ~bits); } -- cgit v1.2.3