From 7dcf9d51e5ffadfcf8b5fceddcddb4e1d0a7db37 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Fri, 16 Oct 2015 13:10:02 -0700 Subject: arm64: tegra132: tegra210: Remove old arm64/stage_entry.S This patch removes the old arm64/stage_entry.S code that was too specific to the Tegra SoC boot flow, and replaces it with code that hides the peculiarities of switching to a different CPU/arch in ramstage in the Tegra SoC directories. BRANCH=None BUG=None TEST=Built Ryu and Smaug. !!!UNTESTED!!! Change-Id: Ib3a0448b30ac9c7132581464573efd5e86e03698 Signed-off-by: Julius Werner Reviewed-on: http://review.coreboot.org/12078 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Aaron Durbin --- src/soc/nvidia/tegra210/maincpu.S | 55 --------------------------------------- 1 file changed, 55 deletions(-) delete mode 100644 src/soc/nvidia/tegra210/maincpu.S (limited to 'src/soc/nvidia/tegra210/maincpu.S') diff --git a/src/soc/nvidia/tegra210/maincpu.S b/src/soc/nvidia/tegra210/maincpu.S deleted file mode 100644 index 898d821d7e..0000000000 --- a/src/soc/nvidia/tegra210/maincpu.S +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#include - -ENTRY(maincpu_setup) - /* - * Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data - * aborts may happen early and crash before the abort handlers are - * installed, but at least the problem will show up near the code that - * causes it. - */ - msr cpsr, #0xdf - - ldr sp, maincpu_stack_pointer - eor lr, lr - ldr r0, maincpu_entry_point - bx r0 -ENDPROC(maincpu_setup) - - .align 2 - - .global maincpu_stack_pointer -maincpu_stack_pointer: - .word 0 - - .global maincpu_entry_point -maincpu_entry_point: - .word 0 -- cgit v1.2.3