From c25b2a18fa42f26a799c55c5e463ecb5f4e4c89e Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Fri, 14 Apr 2017 15:39:23 -0700 Subject: tegra210: Remove fake cpu_reset() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Tegra210 SoC never had a proper cpu_reset() implementation, so it's pointless to pretend there is one. Most ARM SoCs/boards only define hard_reset() at the moment anyway, so let's stick with that. Change-Id: I40f39921fa99d6dfabf818e7abe7a5732341cf4f Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/19786 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Paul Menzel Reviewed-by: Philippe Mathieu-Daudé --- src/soc/nvidia/tegra210/Makefile.inc | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/soc/nvidia/tegra210/Makefile.inc') diff --git a/src/soc/nvidia/tegra210/Makefile.inc b/src/soc/nvidia/tegra210/Makefile.inc index 756d4137e6..a2b50c96c2 100644 --- a/src/soc/nvidia/tegra210/Makefile.inc +++ b/src/soc/nvidia/tegra210/Makefile.inc @@ -12,7 +12,6 @@ bootblock-y += monotonic_timer.c bootblock-y += padconfig.c bootblock-y += power.c bootblock-y += funitcfg.c -bootblock-y += reset.c bootblock-y += ../tegra/gpio.c bootblock-y += ../tegra/i2c.c bootblock-y += ../tegra/pingroup.c @@ -41,7 +40,6 @@ romstage-y += cbmem.c romstage-y += ccplex.c romstage-y += clock.c romstage-y += cpu.c -romstage-y += reset.c romstage-y += spi.c romstage-y += i2c.c romstage-y += dma.c @@ -87,7 +85,6 @@ ramstage-y += gic.c ramstage-y += monotonic_timer.c ramstage-y += padconfig.c ramstage-y += funitcfg.c -ramstage-y += reset.c ramstage-y += ram_code.c ramstage-y += ../tegra/apbmisc.c ramstage-y += ../tegra/gpio.c -- cgit v1.2.3