From 0ee0d92978955db636d7fb9b763f959c8aa413a8 Mon Sep 17 00:00:00 2001 From: Jimmy Zhang Date: Mon, 3 Nov 2014 15:03:46 -0800 Subject: google/rush_ryu: dsi: Enable panel related vdd and clocks BRANCH=none BUG=chrome-os-partner:31936 TEST=build and test on ryu Signed-off-by: Jimmy Zhang Change-Id: Ia10bf7ae3bde389e883970f9a6ee931c32b8172b Signed-off-by: Patrick Georgi Original-Commit-Id: f26902364b6a453adb850abfb0c4ce9686e99b5d Original-Change-Id: I68b92608098959cca14324bfc7e1e58389205989 Original-Reviewed-on: https://chromium-review.googlesource.com/226905 Original-Tested-by: Jimmy Zhang Original-Reviewed-by: Aaron Durbin Original-Commit-Queue: Aaron Durbin Reviewed-on: http://review.coreboot.org/9514 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/nvidia/tegra132/include/soc/clock.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/nvidia/tegra132') diff --git a/src/soc/nvidia/tegra132/include/soc/clock.h b/src/soc/nvidia/tegra132/include/soc/clock.h index e62e0aad32..7fabff74e6 100644 --- a/src/soc/nvidia/tegra132/include/soc/clock.h +++ b/src/soc/nvidia/tegra132/include/soc/clock.h @@ -186,6 +186,8 @@ enum { CLK_S = 6, PLLE = 7, PLLA = 8, + PLLD = 9, + PLLD2 = 10, UNUSED = 100, UNUSED1 = 101, UNUSED2 = 102, @@ -212,6 +214,7 @@ enum { CLK_SRC_FREQ_ID(dev, g) = g enum { + CLK_SRC_DEVICE(disp1, PLLP, PLLM, PLLD, PLLA, PLLC, PLLD2, CLK_M), CLK_SRC_DEVICE(host1x, PLLM, PLLC2, PLLC, PLLC3, PLLP, UNUSED, PLLA), CLK_SRC_DEVICE(I2C1, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M), CLK_SRC_DEVICE(I2C2, PLLP, PLLC2, PLLC, PLLC3, PLLM, UNUSED, CLK_M), -- cgit v1.2.3