From d21a329866a1299b180f8b14b6c73bee3d754e57 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Thu, 19 Feb 2015 14:08:04 -0800 Subject: arm(64): Replace write32() and friends with writel() This patch is a raw application of the following spatch to the directories src/arch/arm(64)?, src/mainboard/, src/soc/ and src/drivers/gic: @@ expression A, V; @@ - write32(V, A) + writel(V, A) @@ expression A, V; @@ - write16(V, A) + writew(V, A) @@ expression A, V; @@ - write8(V, A) + writeb(V, A) This replaces all uses of write{32,16,8}() with write{l,w,b}() which is currently equivalent and much more common. This is a preparatory step that will allow us to easier flip them all at once to the new write32(a,v) model. BRANCH=none BUG=chromium:451388 TEST=Compiled Cosmos, Daisy, Blaze, Pit, Ryu, Storm and Pinky. Change-Id: I16016cd77780e7cadbabe7d8aa7ab465b95b8f09 Signed-off-by: Patrick Georgi Original-Commit-Id: 93f0ada19b429b4e30d67335b4e61d0f43597b24 Original-Change-Id: I1ac01c67efef4656607663253ed298ff4d0ef89d Original-Signed-off-by: Julius Werner Original-Reviewed-on: https://chromium-review.googlesource.com/254862 Reviewed-on: http://review.coreboot.org/9834 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/nvidia/tegra124/uart.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) (limited to 'src/soc/nvidia/tegra124/uart.c') diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c index a25540b025..26aec20030 100644 --- a/src/soc/nvidia/tegra124/uart.c +++ b/src/soc/nvidia/tegra124/uart.c @@ -56,20 +56,19 @@ static void tegra124_uart_init(struct tegra124_uart *uart_ptr) tegra124_uart_tx_flush(uart_ptr); // Disable interrupts. - write8(0, &uart_ptr->ier); + writeb(0, &uart_ptr->ier); // Force DTR and RTS to high. - write8(UART8250_MCR_DTR | UART8250_MCR_RTS, &uart_ptr->mcr); + writeb(UART8250_MCR_DTR | UART8250_MCR_RTS, &uart_ptr->mcr); // Set line configuration, access divisor latches. - write8(UART8250_LCR_DLAB | line_config, &uart_ptr->lcr); + writeb(UART8250_LCR_DLAB | line_config, &uart_ptr->lcr); // Set the divisor. - write8(divisor & 0xff, &uart_ptr->dll); - write8((divisor >> 8) & 0xff, &uart_ptr->dlm); + writeb(divisor & 0xff, &uart_ptr->dll); + writeb((divisor >> 8) & 0xff, &uart_ptr->dlm); // Hide the divisor latches. - write8(line_config, &uart_ptr->lcr); + writeb(line_config, &uart_ptr->lcr); // Enable FIFOs, and clear receive and transmit. - write8(UART8250_FCR_FIFO_EN | - UART8250_FCR_CLEAR_RCVR | - UART8250_FCR_CLEAR_XMIT, &uart_ptr->fcr); + writeb(UART8250_FCR_FIFO_EN | UART8250_FCR_CLEAR_RCVR | UART8250_FCR_CLEAR_XMIT, + &uart_ptr->fcr); } static unsigned char tegra124_uart_rx_byte(struct tegra124_uart *uart_ptr) @@ -82,7 +81,7 @@ static unsigned char tegra124_uart_rx_byte(struct tegra124_uart *uart_ptr) static void tegra124_uart_tx_byte(struct tegra124_uart *uart_ptr, unsigned char data) { while (!(read8(&uart_ptr->lsr) & UART8250_LSR_THRE)); - write8(data, &uart_ptr->thr); + writeb(data, &uart_ptr->thr); } static void tegra124_uart_tx_flush(struct tegra124_uart *uart_ptr) -- cgit v1.2.3