From 2f37bd65518865688b9234afce0d467508d6f465 Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Thu, 19 Feb 2015 14:51:15 -0800 Subject: arm(64): Globally replace writel(v, a) with write32(a, v) This patch is a raw application of the following spatch to src/: @@ expression A, V; @@ - writel(V, A) + write32(A, V) @@ expression A, V; @@ - writew(V, A) + write16(A, V) @@ expression A, V; @@ - writeb(V, A) + write8(A, V) @@ expression A; @@ - readl(A) + read32(A) @@ expression A; @@ - readb(A) + read8(A) BRANCH=none BUG=chromium:444723 TEST=None (depends on next patch) Change-Id: I5dd96490c85ee2bcbc669f08bc6fff0ecc0f9e27 Signed-off-by: Patrick Georgi Original-Commit-Id: 64f643da95d85954c4d4ea91c34a5c69b9b08eb6 Original-Change-Id: I366a2eb5b3a0df2279ebcce572fe814894791c42 Original-Signed-off-by: Julius Werner Original-Reviewed-on: https://chromium-review.googlesource.com/254864 Reviewed-on: http://review.coreboot.org/9836 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/nvidia/tegra/i2c.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'src/soc/nvidia/tegra/i2c.c') diff --git a/src/soc/nvidia/tegra/i2c.c b/src/soc/nvidia/tegra/i2c.c index b9a5f42a37..1d5df3c342 100644 --- a/src/soc/nvidia/tegra/i2c.c +++ b/src/soc/nvidia/tegra/i2c.c @@ -40,9 +40,9 @@ static void do_bus_clear(int bus) // 4. Set TERMINATE condition (1 = IMMEDIATE) bc = read32(®s->bus_clear_config); bc |= I2C_BUS_CLEAR_CONFIG_BC_TERMINATE_IMMEDIATE; - writel(bc, ®s->bus_clear_config); + write32(®s->bus_clear_config, bc); // 4.1 Set MSTR_CONFIG_LOAD and wait for clear - writel(I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD_ENABLE, ®s->config_load); + write32(®s->config_load, I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD_ENABLE); for (i = 0; i < timeout_ms * 10 && (read32(®s->config_load) & I2C_CONFIG_LOAD_MSTR_CONFIG_LOAD_ENABLE); i++) { printk(BIOS_DEBUG, "%s: wait for MSTR_CONFIG_LOAD to clear\n", @@ -50,7 +50,7 @@ static void do_bus_clear(int bus) udelay(100); } // 5. Set ENABLE to start the bus clear op - writel(bc | I2C_BUS_CLEAR_CONFIG_BC_ENABLE, ®s->bus_clear_config); + write32(®s->bus_clear_config, bc | I2C_BUS_CLEAR_CONFIG_BC_ENABLE); for (i = 0; i < timeout_ms * 10 && (read32(®s->bus_clear_config) & I2C_BUS_CLEAR_CONFIG_BC_ENABLE); i++) { printk(BIOS_DEBUG, "%s: wait for bus clear completion\n", @@ -74,7 +74,7 @@ static int tegra_i2c_send_recv(int bus, int read, rx_full >>= I2C_FIFO_STATUS_RX_FIFO_FULL_CNT_SHIFT; while (header_words && tx_empty) { - writel(*headers++, ®s->tx_packet_fifo); + write32(®s->tx_packet_fifo, *headers++); header_words--; tx_empty--; } @@ -96,7 +96,7 @@ static int tegra_i2c_send_recv(int bus, int read, int todo = MIN(data_len, sizeof(word)); memcpy(&word, data, todo); - writel(word, ®s->tx_packet_fifo); + write32(®s->tx_packet_fifo, word); data_len -= todo; data += sizeof(word); tx_empty--; @@ -208,5 +208,5 @@ void i2c_init(unsigned bus) { struct tegra_i2c_regs * const regs = tegra_i2c_info[bus].base; - writel(I2C_CNFG_PACKET_MODE_EN, ®s->cnfg); + write32(®s->cnfg, I2C_CNFG_PACKET_MODE_EN); } -- cgit v1.2.3