From 8d5313774982d9d637683ec1de0f53528aa700ee Mon Sep 17 00:00:00 2001 From: Hsin-Hsiung Wang Date: Tue, 4 Jun 2019 11:24:25 +0800 Subject: soc/mediatek/mt8183: Allow modifying vdram1 voltage DRAM DVFS needs to be calibrated with different vdram1 voltages to get correct parameters. A new API is added to allow changing vdram1 voltage. BUG=b:80501386 BRANCH=none TEST=measure vdram1 voltage with multimeter Change-Id: Ia15ab3a2e1668e5b4873d317b57a38ebee037709 Signed-off-by: Hsin-Hsiung Wang Reviewed-on: https://review.coreboot.org/c/coreboot/+/33186 Reviewed-by: Hung-Te Lin Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8183/include/soc/mt6358.h | 5 +++++ src/soc/mediatek/mt8183/mt6358.c | 21 +++++++++++++++++++++ 2 files changed, 26 insertions(+) (limited to 'src/soc/mediatek') diff --git a/src/soc/mediatek/mt8183/include/soc/mt6358.h b/src/soc/mediatek/mt8183/include/soc/mt6358.h index bb5f019433..6ed654ccfd 100644 --- a/src/soc/mediatek/mt8183/include/soc/mt6358.h +++ b/src/soc/mediatek/mt8183/include/soc/mt6358.h @@ -29,6 +29,9 @@ enum { PMIC_VCORE_DBG0 = 0x149e, PMIC_VCORE_VOSEL = 0x14aa, PMIC_VDRAM1_VOSEL_SLEEP = 0x160a, + PMIC_VDRAM1_OP_EN = 0x1610, + PMIC_VDRAM1_DBG0 = 0x161e, + PMIC_VDRAM1_VOSEL = 0x1626, PMIC_SMPS_ANA_CON0 = 0x1808, PMIC_VSIM2_ANA_CON0 = 0x1e30, }; @@ -46,5 +49,7 @@ void pmic_set_vsim2_cali(unsigned int vsim2_mv); void pmic_init_scp_voltage(void); unsigned int pmic_get_vcore_vol(void); void pmic_set_vcore_vol(unsigned int vcore_uv); +unsigned int pmic_get_vdram1_vol(void); +void pmic_set_vdram1_vol(unsigned int vdram_uv); #endif /* __SOC_MEDIATEK_MT6358_H__ */ diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c index 3600b6a3de..9ee27b958f 100644 --- a/src/soc/mediatek/mt8183/mt6358.c +++ b/src/soc/mediatek/mt8183/mt6358.c @@ -826,6 +826,27 @@ void pmic_set_vcore_vol(unsigned int vcore_uv) pwrap_write_field(PMIC_VCORE_VOSEL, vol_reg, 0x7F, 0); } +unsigned int pmic_get_vdram1_vol(void) +{ + unsigned int vol_reg; + + vol_reg = pwrap_read_field(PMIC_VDRAM1_DBG0, 0x7F, 0); + return 500000 + vol_reg * 12500; +} + +void pmic_set_vdram1_vol(unsigned int vdram_uv) +{ + unsigned int vol_reg; + + assert(vdram_uv >= 500000); + assert(vdram_uv <= 1300000); + + vol_reg = (vdram_uv - 500000) / 12500; + + pwrap_write_field(PMIC_VDRAM1_OP_EN, 1, 0x7F, 0); + pwrap_write_field(PMIC_VDRAM1_VOSEL, vol_reg, 0x7F, 0); +} + static void pmic_wdt_set(void) { /* [5]=1, RG_WDTRSTB_DEB */ -- cgit v1.2.3