From 8cc8b3c14b07d03e4c702510b21d7e311049798e Mon Sep 17 00:00:00 2001 From: Sen Chu Date: Wed, 16 Aug 2023 08:44:41 +0800 Subject: soc/mediatek/mt8188: Simplify pmif init flow Based on "MediaTek_EFUSE_MT8188_Confidential A_Technical Doc.docx", MT8188G used in ChromeOS project does not support clock hardware monitor. Thus, we can simplify the initialization flow by removing the hardware default value check. BUG=b:292866009 TEST=emerge-geralt coreboot BRANCH=none Change-Id: I07cd753f153da5b0aea1518a04a818214f986aeb Signed-off-by: Sen Chu Reviewed-on: https://review.coreboot.org/c/coreboot/+/77334 Reviewed-by: Yidi Lin Tested-by: build bot (Jenkins) Reviewed-by: Yu-Ping Wu --- src/soc/mediatek/mt8188/pmif_clk.c | 19 +++++-------------- 1 file changed, 5 insertions(+), 14 deletions(-) (limited to 'src/soc/mediatek') diff --git a/src/soc/mediatek/mt8188/pmif_clk.c b/src/soc/mediatek/mt8188/pmif_clk.c index 0a943254f1..9756f99d1a 100644 --- a/src/soc/mediatek/mt8188/pmif_clk.c +++ b/src/soc/mediatek/mt8188/pmif_clk.c @@ -121,20 +121,11 @@ static int pmif_init_ulposc(void) int pmif_clk_init(void) { - u32 ulposc1; - - /* check hardware default value first */ - ulposc1 = pmif_get_ulposc_freq_mhz(CALI_DEFAULT_CAP_VALUE); - if (pmif_ulposc_check(ulposc1, FREQ_260MHZ)) { - /* - * If the hardware value is not what we want, we need to adjust - * it by the software setting. - */ - pmif_clockmonitor_config(false); - if (pmif_init_ulposc()) - return E_NODEV; - pmif_clockmonitor_config(true); - } + /* initialize pmif clock */ + pmif_clockmonitor_config(false); + if (pmif_init_ulposc()) + return E_NODEV; + pmif_clockmonitor_config(true); /* turn off pmic_cg_tmr, cg_ap, cg_md, cg_conn clock */ SET32_BITFIELDS(&mt8188_infracfg_ao->module_sw_cg_0_set, PMIC_CG_TMR, 1, PMIC_CG_AP, 1, -- cgit v1.2.3